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Subsections
It is well known that GaAs-HBTs with an InGaP ledge have an improved reliability
[203]. The emitter material covers the complete p-doped base layer, thus
forming the so-called ledge. The impact of the ledge thickness and negative
surface charges, which exist at the ledge/nitride interface, on the device
performance is investigated using MINIMOS-NT.
The surface charges have large impact on the Fermi-level pinning at
the InGaP/SiN interface. A schematic drawing of the simulated device structure
is shown in Fig. 4.14. In order to save computational effort, the simulation
domain covers only one half of the real symmetric device structure.
Figure 4.28:
Hole current density [A/cm]:
Leakage path near the SiN interface occurring in the presence of negative charges
|
In case of devices where no ledge is present (see Fig. 4.28), the simulation
results suppose that during stress some of the electrons flowing in the emitter
are injected in the insulator and get trapped there. The negative charge at the
semiconductor/insulator interface can lead to a hole leakage path in the
vicinity of the interface, and therefore, to undesirably high base currents.
In Fig. 4.29 measured and simulated collector and base currents of one-finger
InGaP/GaAs HBTs with different ledge thickness operating under forward Gummel
plot conditions with V = 0 V are shown. Measurement refers to a
device with 40 nm ledge thickness. Surface charges at any of the device
interfaces are not yet considered in the simulation. Note the strong increase
in the base current at low bias with increasing ledge thickness. As can be seen
from Fig. 4.29 simulated and measured base currents differ significantly in
the case of 40 nm ledge thickness. Only simulation with a ledge thickness of
less than 20 nm delivers a good match. The reason is that insulator surface
Fermi-level pinning is not taken into account if surface charges are not
considered in the simulation. Therefore, a non-physical electron current path
occurs in the upper part of the ledge, as shown in Fig. 4.30. However, this
leakage path can be overcome by means of electrically isolated base
contacts. The corresponding electron distribution in the ledge using vertical
cross-sections at x = 1.6 m, 2.0 m, and 2.4 m is shown in
Fig. 4.31. The hole distribution in the middle of the ledge (x = 2.0 m)
is also included. These concentrations shall be compared to the ones in the
case of surface charges in the next subsection.
Figure 4.29:
Dependence of I
on the InGaP ledge thickness
compared to measurement
|
Figure 4.30:
Electron current density [A/cm] at V
=1.2V:
Simulation without surface charges
|
Figure 4.31:
Electron and hole distribution in the ledge:
Simulation without surface charges
|
As can be seen from Fig. 4.32, where symbols represent experimental data for
the collector current I and the base current I and simulation
refers to a device with 40 nm ledge, the base current decreases if more
negative surface charges are introduced. The upper part of the ledge is
depleted as well [204] and the leakage is reduced (Fig. 4.33). The
corresponding electron distribution in the ledge at x = 1.6 m, 2.0 m,
and 2.4 m, and the hole distribution at x = 2.0 m are presented in
Fig. 4.34. Note that even in this case the ledge is not completely
depleted. However, the electron concentrations near the InGaP/SiN interface
are significantly lower in comparison to the ones shown in
Fig. 4.31. Thus, with a surface charge density of cm the
measured base current can be simulated very well. Note that in the
case of negative surface charges the hole concentration in the ledge increases
and at higher values gives the opportunity a hole current path to occur.
Figure 4.32:
Dependence of I
on the negative charge density at the
ledge/nitride interface with d = 40 nm: A charge density of cm is sufficient to
get good fit to the measurements
|
Figure 4.33:
Electron current density [A/cm] at V
=1.2V:
Simulation with a surface charge density of cm
|
Figure 4.34:
Electron and hole distribution in the ledge:
Simulation with a surface charge density of cm
|
Next: 4.4.2 Device Reliability
Up: 4.4 Analysis of HBT
Previous: 4.4 Analysis of HBT
Vassil Palankovski
2001-02-28