The process flow simulation capabilities presented in the
previous chapters provide a sound basis for applications that
use results from simulation to model and analyze semiconductor
technology. The term task level
carries different meanings
in the literature, depending on the point of view and the objectives
in a particular context. See [KGMB94] for an extensive discussion
of the subtle differences in terminology, approach, and philosophy
regarding the definition of task
in the CAD domain
.
In this work, it refers to TCAD applications that
use results obtained from process and device simulation for further
analysis. Figure 8.1 shows the relation between tasks,
tools, and tool control level in the VISTA/SFC environment.
Figure 8.1:
Tasks, tools, and tool control level in VISTA/SFC.
Process simulation, thus, is not regarded as a task-level
application on its own, but just delivers the necessary results
for more complex analyses.
All of these applications seek to gain insight into a particular
process or process technology by sampling the design
space
and identifying and modeling the underlying mechanism.
Simulation
is used as a substitute for measurements and real-observations for
cost and time reasons (Figure 8.2).
Figure 8.2:
Design-space probing and simulation.
Only three dimensions of the n-dimensional design space are shown for
clarity.
Design space probing does not necessarily lead to a valid result, but there exists always the possibility of selecting a design point that is not allowed for a given design. Consequently, the failure of a simulation tool should not be regarded as an unlikely event, but rather as a regular case, indicating a range fault in the design space. If this fundamental insight is applied properly to the design of tool-control frameworks, a more stable and robust operation is achieved.