TCAD uses process flow information and layout data to simulate the fabrication process as well as the device behavior prior to actual fabrication to determine viable technologies and to improve existing ones. For each fabrication step, numerical simulation tools are used to compute the changes of the wafer model in accordance with the real-world effect. The final wafer model contains the complete device structure including material layers and dopant distributions. On a two-dimensional or three-dimensional sub-domain of wafer model, the semiconductor equations are solved to compute the electrical behavior of the device at various operating points and under different conditions. The extracted device characteristics are the basis for optimizations of the fabrication process as well as of the circuit design.
As a single wafer takes many weeks to be fabricated,
semiconductor process and device design can substantially benefit
from the use of simulation and modeling to reduce the cost and time
required to develop new or extend existing technology
[Mar93] [Mar96].
A concise introduction into the use of simulation in semiconductor
technology development is given in Cole et al. [CBF
90].
As the complexity of the processes is steadily increasing - with respect to the number of fabrication steps as well as to the physics involved when going to smaller device dimensions -, the demands on simulation are constantly growing. At the same time, competitive markets call for shorter product development cycles. To help TCAD keep the pace with these trends, TCAD frameworks are used to share common tasks among simulation tools and applications, organize the management of simulation data, and assist the process and device engineers with tasks that are beyond the context of a single TCAD tool. For a brief evaluation of design frameworks in general, see Kleinfeldt et al. [KGMB94]; for a summary of TCAD frameworks, refer to Halama [Hal94]