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3.1.1 Defining a Simulation Domain
In contrast to manufacturing, where for obvious reasons only entire wafers are
processed, it is necessary to define an area of interest for the
simulation. This might range from single structures like vias or trenches of
shallow trench isolation (STI) features to transistors or other single
active or passive devices up to a larger area including several devices with
their interconnects. The choice of the simulation domain depends on the problem
under investigation and is related with the required accuracy tunable by the
number of cells used per unit length.
Figure 3.1:
Definition of a simulation domain.
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Defining a simulation domain as depicted in Fig. 3.1 is like starting with
a bare wafer in the fabrication facility. The solid modeling program allows the
definition of the extensions of the three-dimensional simulation domain and
defines the cell resolution. Furthermore it specifies the vertical position of
the wafer surface within the simulation domain. For etching processes the
surface will be located close to the top of the simulation domain, for
deposition steps it will reside lower in the simulation domain in order to
avoid, that the applied structures exceed the upper limit of the simulation
domain.
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W. Pyka: Feature Scale Modeling for Etching and
Deposition Processes in Semiconductor Manufacturing