5.1 The Conventional Device

The double-diffused MOS transistor (DMOS) is a special type of MOS transistor in which the channel region is formed by two impurity implants. The channel length is determined by the different lateral extent of the two impurity profiles. In a vertical DMOS (VDMOS) the drain contact is located at the bottom side of the substrate. This makes it possible to densely place several hundreds or even thousands of devices in an array structure and to switch them in parallel. Such devices are frequently used in power applications.

The on-resistance of a VDMOS is one of its most important parameters because it limits the current which can be conducted by the device before it is damaged by the heat generated in the transistor. Therefore the on-resistance should be as low as possible. Another important parameter is the maximum blocking voltage. This is the maximum voltage applied between the source and drain contacts with zero gate-source voltage which does not lead to breakdown.

Figure 5.1: Geometry of the original VDMOS.

The investigated device is part of a small-signal transistor for drain-source voltages up to 100 V and continuous drain currents up to 1 A. The maximum pulsed drain current of the transistor is 4 A. The packaged transistor consists of 1671 devices connected in parallel. Fig. 5.1 shows the geometry of the original device.

The symmetry of the device was exploited by simulating only one half of the device in order to reduce the required memory and CPU time. Fig. 5.2 shows the geometry which was used for the simulations of the conventional and modified devices.

Figure 5.2: Geometry used for simulation.

Fig. 5.3 shows the on-resistance of the packaged device for drain currents up to nearly 6 A. The maximum electric field which limits the source-drain breakdown voltage increases nearly linear with the applied drain-source voltage up to 150 V for the conventional device as can be seen in Fig. 5.4. For Si the magnitude of the electric field which must not be exceeded to avoid impact ionization is approximately 300 kV cm^{- 1}.

Figure 5.3: Source-drain resistance of the conventional device.

Figure 5.4: Maximum electric field of the conventional device.