The simulation of semiconductor devices and their fabrication processes is an important tool for the development of new devices and the improvement of existing designs. With the aid of simulations it is possible to verify new concepts and to identify the most promising variants. Simulation also enables the device engineer to investigate designs which cannot be manufactured at the time of development for various reasons. Even if the new device could be manufactured it is usually not possible, with respect to cost and development time, to manufacture each of the new designs (which might give the desired improvements) and investigate the measurement results. Additionally, many effects can be analyzed easier and more detailed by simulation than by measurement.
This section demonstrates the optimization of the on-resistance of an existing VDMOS based on process and device simulation.