5.2 Improved Designs

To achieve the desired maximum drain current of the packaged transistor the appropriate number of single devices are switched in parallel and packaged together. Another possibility to improve the maximum current of the packaged device is to reduce the on-resistance of each single device. The on-resistance of a VDMOS is mainly made up by the resistance of the low doped epitaxially grown layer (epi-layer). By introducing an additional doping in the epi-layer it is possible to reduce the on-resistance compared to the conventional design. The higher doping not only reduces the on-resistance, it also increases the maximum electric field. High electric fields cause impact ionization which leads to breakdown and thereby limits the source-drain voltage at which the device can be used. Therefore a compromise between the reduction of the on-resistance and the increasing maximum electric field has to be found.

The goal of the device optimization was to considerably reduce the on-resistance without degrading other performance parameters, e.g., maximum source-drain voltage. The design of the optimized device was further restricted by the requirement that the optimized device can be produced at costs comparable to that of the original device. This considerably limits the degree of freedom for designing improved devices.

To reduce the on-resistance the concentration of the n-doping in the epi-layer is increased uniformly. To retain the voltage blocking capability the additional n-doping has to be compensated by an appropriate p-doping. Several different configurations are possible.

Figure 5.5: Modified device structure with increased doping concentration in the n-epi-layer and an additional vertical p-doped area.

Figure 5.6: Modified device structure with vertical n- and p-doped areas underneath the gate contact.

Figure 5.7: Modified device structure with two vertical n- and p-doped areas.

Fig. 5.5 shows a configuration where the doping concentration of the n^- epi-layer has been increased. To compensate the higher n-doping concentration a vertical p^- doped area is placed below the source contact. Because of the higher doping concentration the resistance of the n^- epi-layer is lower than in the original device. Width and concentration of the vertical p^- doped area have to be chosen in such a way that the extension of the space charge region is big enough to be able to turn the device off.

In the variant shown in Fig. 5.6 the additional vertical n^- and p^- dopings are centered underneath the gate contact. With this placement it is easier possible to deplete the higher doped regions and turn the device off compared to the previous device. A considerable drawback is that the vertical p^- doped area has to be connected somehow to the source region to avoid a floating region.

The disadvantages of the previous two devices can be avoided by placing a vertical p^- doped region below the source contact and a vertical n^- doped region underneath the gate contact at the end of the p^- diffusion as shown in Fig. 5.7.

When the device is turned on the n^- implant has a much lower resistance than the surrounding n^- epi-regions. When the device is turned off a depletion region forms at the junction of the n^- and p^- implants and increases the source-drain resistance.