It becomes clear from this figure that each of these process modules needs to be calibrated individually as far as measurements are available, or can be carried out. Otherwise it would be hard to identify correct sets of parameters for each of these modules. SIESTA supports such a short flow methodology [79] which calibrates modules individually, as depicted in Figure 5.3. Since the calibration procedure is successively applied to each module of the process flow, a fairly good accuracy of the resulting full process model can be achieved.
After all modules have successfully been calibrated they can be
combined by a network-model as depicted in Figure 5.4 in
order to model the full fabrication process. It should be noted that
the calibrated simulation-flow-model -- which actually represent modules
of the fabrication process -- can be used within this network-model
as they are, without any need for a reconfiguration of their model
descriptions or port settings and thus the risk to introduce errors is
eliminated. A modeling structure like that is especially beneficial as
soon as multiple engineers are concurrently working on the
implementation or maintenance of a simulation model. Using a modular
representation like described above, individual process modules can be
implemented by dedicated specialists of a particular technology
field. Their results are contributed to a library of process module
models from where they are available for TCAD users who combine
those modules to model complete IC fabrication processes.
