D.4 Simple Adiabatic Techniques

As shown before, the realization of adiabatic CMOS faces problems in many situation, which reduces its effective leverage restricts its applicability. There are, however, cases where parts of a circuit can be made adiabatic without much overhead and, most importantly, without performance penalty.

One such case is long chip-to-chip interconnects. An interconnect line may be operated like a capacitance, causing CV² per pulse to be dissipated, or requiring special adiabatic charging and discharging as discussed above. However, the line may also be operated like a transmission line, i.e., with a resistive termination at its end. Although this approach involves energy disspation (the information energy is dissipated in the receiver), both the line and the driver work truly adiabatic, provided that the driver's output resistance is sufficiently small ^D.3 and the line attenuation is not too large. ^D.4 Very interestingly, the role of speed is reversed: the switching energy (i.e. twice the energy per bit) is proportional to the time per bit. Such high-speed serial data transmission was proposed earlier, though not in the context of adiabatic systems [75,42].

Footnotes

... small^D.3

$R_{out} \ll Z_0$, where Z₀ is the lines characteristic impedance.

... large.^D.4

Allowing for correct reception, i.e., the maximum allowable attenuation in dB is the difference of the driver SNR and the minimum SNR in dB at the receiver end.