4.2.2 Interface State Profile of an Unstressed Device

Applying this separation technique it is possible to use the technique for N_it extraction developed in [176]. The interface trap concentration of a pre-stressed device can be written as

**Figure 4.7:** The lateral interface state density: comparison of uniform and nonuniform profiles for channel lengths of (a) 0.5 and (b) 2.0um.
(a) (b)

Figure 4.7a depicts a comparison between the uniform and nonuniform interface state density profiles. It is believed that the gap in the center of the device can be linked to the peculiarities of the device fabrication process. The inset in Figure 4.7a represents the donor doping concentration with increased gradient at 0.85um where N_it(x) reaches a uniform value, i.e. the transistor doping can affect the interface state density in this way. An identical tendency shown in Figure 4.7b, i.e the correlation between the N_it gap and the donor doping concentration profile, was revealed for the device of the same topology (produced using the same technology) but with a gate length of 2um. Moreover, the non-uniformity of the initial N_it profile can be easily visualized within a constant amplitude CP technique. In this case the gate pulse covers the device interface step by step. According to (4.3), the charge pumping current is proportional to the interface state density averaged over the effective measurement length. I_cp,max depicted in Figure 4.8a inset is reached at a base level of -2V. At the same time, the maximal effective length corresponds to -1V, i.e. in this area the N_it concentration is lower. This approach which is based on another measurement setup additionally confirms previous findings.

**Figure 4.8:** (a) The effective channel length determination in the case of constant amplitude charge-pumping current measurement. Inset: charge-pumping current vs. low-level of the gate pulse (V_A=2V). (b) Maximum value of the charge pumping current for different gate electrode lengths of the fresh CMOS device fabricated on 300mm Si wafers.
(a) (b)

However, the demonstrated non-uniformity of the unstressed N_it profile is not a mandatory phenomenon. As an example, a CMOS device fabricated on 300mm (100) Si wafers using a metal-inserted poly-Si process (the high-k dielectric is mainly HfO₂) demonstrates in Figure 4.8b a linear dependence between the maximum value of the charge pumping current and gate electrode lengths. This ideal linear graph confirms a uniform initial N_it distribution for such a class of MOSFETs.