In sub-micron technologies with small active area, the mechanical stress
induced from shallow trench isolation (STI) cannot be neglected
[Wang03]. STI can induce lateral (parallel to the channel) and transversal
mechanical stress (in the width direction of transistor). A reduction of the
transistor width amplifies the compressive stress in the channel induced by
STI, which was shown to yield an increase of the hole mobility [Chan03].
Figure 2.3:
Combination of epitaxial source/drain regions and stress
liner to induce compressive uniaxial stress for the p-channel MOSFET and tensile
uniaxial stress for the n-channel MOSFET.
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E. Ungersboeck: Advanced Modelling Aspects of Modern Strained CMOS Technology