The rapid increase in computational power and speed of integrated circuits is supported by the aggressive size reduction of semiconductor devices. Downscaling of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), as institutionalized by Moore's law, is successfully continuing because of innovative changes in the technological processes and the introduction of new materials. Until recently, the main method of increasing complementary Metal-Oxide Semiconductors (CMOS) transistor performance was based on geometrical scaling, which has led to enormous success in increasing the speed and functionality of electronic devices. Rising costs of chip manufacturing makes further scaling increasingly more difficult: the feasibility of fabrication cannot be easily guaranteed, and maintaining performance and reliability becomes a severe issue. New engineering solutions and innovative techniques are required to improve CMOS device performance. Strain-induced mobility enhancement is the most attractive way to increase the device speed and will certainly take a key position among other technological changes for future technology generations. The 32nm MOSFET process technology recently developed by Intel employs advanced fourth generation strain engineering techniques.
In addition, new device architectures based on multi-gate structures with better electrostatic channel control and reduced short channel effects will be developed. A multi-gate MOSFET architecture is expected to be introduced for the 22nm technology node. Combined with a high-k dielectric/metal gate technology and strain engineering, a multi-gate MOSFET appears to be the ultimate device for high-speed operations with excellent channel control, reduced leakage currents, and low power budget.
A comprehensive analysis of transport in multi-gate MOSFETs under general stress conditions is required in order to understand the device enhancement performance. Mobility enhancement in p-channel MOSFETs was intensively theoretically studied and a good understanding was achieved. An effective mass approximation, usually employed to describe the conduction band, is not sufficient to describe mobility enhancement in multi-get strained n-MOSFETs for two reasons: the conductivity mass depending on the value of uniaxial [110], and a direction-dependent anisotropic non-parabolicity must be introduced to correctly describe subband energies and transport in FinFETs.
The subband structure in a confined system must be based on accurate bulk bands including strain. The two-band k·p model introduced by Hensel, Hasegawa, and Nakayama excellently describes the conduction band up to an energy of 0.6eV. It allows obtaining the subband energies, the effective masses, and non-parabolicity of the subbands. Interestingly, the unprimed subbands in (001) films are not equivalent, as demonstrated in the contour plot of the dispersion for the two lowest subbands with the same quantum number n=1 (figure 1).
Calculated subband parameters are used to evaluate transport enhancement in MOSFETs.
Current enhancement in a ballistic FET with an ultra-thin silicon body is shown in figure 2. The reason for higher level enhancement at large voltages is the strain-induced energy splitting between the unprimed subbands with the same quantum number. The splitting increases with strain and is particularly large in thin films. Due to this splitting the density of states decreases with strain prompting an increase in the chemical potential and current. In saturation, the increase of the Fermi level is larger than in the linear regime, which guarantees the large drive current enhancement.