1 Introduction
2 Charged Carrier Transport and Single Defects in Si FETs
 2.1 Charged Carrier Transport: General Equations and Models
  2.1.1 Single-Particle Schroedinger Equation
  2.1.2 Boltzmann Transport Equation and Method of Moments
  2.1.3 Drift-Diffusion Model
 2.2 Modeling of Random Dopants and Discrete Traps
 2.3 Characterization of Preexisting Defects Using Time-Dependent Defect Spectroscopy
3 Main Reliability Issues in Si MOSFETs and Their Modeling
 3.1 Overview of Reliability Issues
  3.1.1 Negative Bias-Temperature Instability
  3.1.2 Positive Bias-Temperature Instability
  3.1.3 Hot-Carrier Degradation
  3.1.4 Other Reliability Issues
 3.2 Modeling of BTI in Si MOSFETs
  3.2.1 Universal Relaxation Model
  3.2.2 Capture/Emission Time Map Model
  3.2.3 Four-state NMP Model
4 Next Generation FETs Based on 2D Materials
 4.1 Overview of 2D Materials: Graphene, MoS₂ and Beyond
  4.1.1 Graphene: Structure and Main Properties
  4.1.2 MoS₂ as a Further Step Beyond Graphene
  4.1.3 Phosphorene, Silicene and Germanene: New Era in Semiconductor Science
  4.1.4 Hexagonal Boron Nitride as a Next-Generation 2D Insulator
 4.2 Properties of Graphene FETs
  4.2.1 Different Realizations of GFETs
  4.2.2 Operation and Reliability
 4.3 MoS₂ FETs: an Important Step Beyond GFETs
5 Impact of Charged Traps and Random Dopants on the Performance of Si MOSFETs
 5.1 Previous Descriptions and their Disadvantages
 5.2 Experimental Technique
 5.3 TCAD Simulations
 5.4 Compact Model
 5.5 Extraction of the Lateral Trap Position
  5.5.1 Method Description and Verification
  5.5.2 Simplified Technique
  5.5.3 Results and Discussions
 5.6 Chapter Conclusions
6 Reliability of Graphene FETs
 6.1 Introduction
 6.2 Investigated Devices: Fabrication and Basic Characteristics
 6.3 Experimental Technique
 6.4 Modeling of Carrier Distribution in GFET Channel
 6.5 Bias-Temperature Instabilities on the High-k Top Gate
  6.5.1 Typical Impact on the Device Performance and Reproducibility
  6.5.2 Temperature Dependence and Fitting with CET Map and Universal Models
 6.6 Bias-Temperature Instabilities on the SiO₂ Back Gate
  6.6.1 Stress Oxide Field Dependence and Recovery
  6.6.2 Comparison with Top Gate BTI
 6.7 Hot-Carrier Degradation
  6.7.1 First Observations and Typical Impact on the Device Performance
  6.7.2 Degradation under Different Polarities of HC and Bias Components
  6.7.3 Impact of HCD on Charged Trap Density and Carrier Mobility
  6.7.4 Similarities to BTI and Fitting with General Models
 6.8 Chapter Conclusions
7 Reliability of MoS₂ FETs
 7.1 Introduction
 7.2 Investigated Devices: Fabrication and Basic Characteristics
 7.3 Experimental Technique
 7.4 Hysteresis Stability
 7.5 Analysis of Bias-Temperature Instabilities
 7.6 Modeling of BTI Characteristics Using Minimos-NT
 7.7 Chapter Conclusions
8 Conclusions and Outlook