3.3.2 System Model

In this work a simple model of a homogeneous digital system as described in Section A.3.1 is used. The system and operating parameters are listed in Table 3.2, where $\ensuremath{{\mathit{ar}}}$ , $\ensuremath{{\mathit{ld}}}$ , $\ensuremath{F_{\mathit{io}}}$ , $\ensuremath{L_{\mathit{M}}}$ , and $\ensuremath{c_{\mathit{M}}}$ characterize the system and primary operating parameters are $\ensuremath{V_{\mathit{DD,nom}}}\xspace$ , $\ensuremath{L_{\mathit{nom}}}\xspace$ , $\ensuremath{T_{\mathit{nom}}}\xspace$ , and $\ensuremath{f_{\mathit{c,nom}}}\xspace$ . Furthermore, to enable investigations based on just one device type (e.g., the NMOS transistor), all analyses can be carried out assuming symmetric (but statistically independent) transistors. For clarity, most equations are only given for the single-device-type case.

**Table 3.2:** System and operating parameters
	parameter
$\ensuremath{{\mathit{ar}}}$	activity ratio
$\ensuremath{{\mathit{ld}}}$	logic depth
$\ensuremath{F_{\mathit{io}}}$	average fan-in/fan-out
$\ensuremath{L_{\mathit{M}}}$	average interconnect length
$\ensuremath{c_{\mathit{M}}}$	interconnect capacitance per length
$\ensuremath{V_{\mathit{DD,nom}}}$	nominal supply voltage
$\ensuremath{L_{\mathit{nom}}}$	nominal gate length
$\ensuremath{T_{\mathit{nom}}}$	nominal operating temperature
$\ensuremath{f_{\mathit{c,nom}}}$	nominal clock frequency