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Sum total of dynamic and static power consumption, and the
switching energy per transistor are modeled as [42]
|
(3.24) |
and
|
(3.25) |
neglecting the crow-bar current during the switching transient,
which is usually applicable.
The switching energy is the energy per transistor switching and is
therefore independent of the system architecture.
However, activity ratio and logic depth (the latter via
,
cf. (3.12))
affect the tradeoff between power consumption and speed significantly.
According to the system model the power delay product is related
to the switching energy as:
|
(3.26) |
G. Schrom