The reasons why MOSFET modeling for circuit simulation is still precarious are manifold. One reason is the improvement of technology: device models based on long-channel MOSFETs for high voltages lose their validity simply because modern high-performance MOSFETs feature electrically short channels. Another reason is the interaction between circuit complexity and the sensitivity to modeling errors: small errors in device terminal quantities and even smaller errors in their derivatives turn into large errors in the results of circuit simulation, or even worse, convergence problems.
In high-performance analog circuits the primary concern is to accurately model not only the terminal quantities but also their derivatives. This concerns especially weak inversion and the transition to strong inversion, i.e., moderate inversion, consistency of DC and AC parameters as well as charge conservation. For some applications like, e.g., RF circuits, non-quasi-static effects of the channel also play an important role. Early models, most notably the SPICE level 3 MOSFET model, are not even differentiable in this region [43]. Note, that although the derivatives which are passed from the model to the simulator do not affect the result but only the convergence rate, the numerical derivatives of the terminal quantities do. In particular, when voltage gain is of primary interest the result may be wrong by orders of magnitude. While this is not a big issue for the simulation of digital circuits it can totally corrupt certain analog-circuit simulations. Consequently, severe problems with existing models, especially, for analog applications keep being reported by various authors [81,2,28,92,34].
In high-performance digital circuits short-channel effects and drain-induced barrier lowering Section A.1.3, which both can be quite complex, must be modeled with sufficient accuracy. Despite the variety of short-channel models [16,34] this topic is far from being solved. This is partly due to the complex dependence of the threshold voltage on the channel length and due to the interaction of DIBL and body effect. 4.1 In low-voltage digital circuits the requirements on device model accuracy become similar to those of analog circuits. This is also because designs for maximum performance or maximum energy efficiency are determined by the weak-inversion region (cf. Section 2.2).
In Ultra-Low-Power circuits, especially in high-performance circuits, most of the aforementioned points take full effect. Adding to that, the variety of possible ULP processes to be considered is large as against standard CMOS technologies, not least because they are still being a subject of research rather than development and so are the circuits to be built with ULP technologies.
It is virtually impossible to capture all these effects accurately with a simple, physically based model. Consequently, the number of model parameters increases beyond a point where most of them are merely fitting parameters.