The device topography conforms to the planar idealized
device
structure (see Fig. 6.1).
The source and drain contact lengths (LS, LD)
and the gate poly thickness (GCTHE) are set to the nominal gate length
.
The spacer widths (SGAP, DGAP) are set to
.
The transistor width was assumed as
The doping profile is given analytically in terms of joined half Gaussian
functions
which are computed according to the primary device
structure parameters.
The channel profile is assumed constant with a concentration of
.
The source/drain profiles are idealized as rectangular boxes with a
supersteep Gaussian fall-off, which is achieved by
and
and a vertical offset of
.
The underdiffusion length is set to
.
The concentration of the source/drain profiles is assumed as
which is roughly the maximum achievable electrically
active arsenic concentration.
Note, that there is no second source/drain doping and, also, there is
no LDD doping. Instead, the shallow dopings serve only to
provide the best contact between source/drain and the channel.
The primary device structure parameters, which are also technology
parameters, are
,
,
and
.
The channel doping is determined automatically (cf.
Section C) according to a nominal off-state current
at
worst-case conditions
which are
and
.
Note that
is a very indirect measure for circuit functionality
and performance, which are the actual targets. However, to take
as a design parameter in optimizations enables physically
and numerically well-behaved algorithms.
The device simulations were carried out with
MINIMOS 6.0, which means that
all effects covered by a drift-diffusion simulation are accounted for.
Quantization effects in the channel are indirectly considered by the
choices of
as explained in Section 6.2.
This, as well as the precise definition of the device structure and
the optimization constraints in Table 6.3
should be kept in mind when comparing absolute values, e.g., of
or
to other published data.