Erasmus Langer
Siegfried Selberherr
Oskar Baumgartner
Hajdin Ceric
Johann Cervenka
Otmar Ertl
Wolfgang Gös
Klaus-Tibor Grasser
Philipp Hehenberger
René Heinzl
Gerhard Karlowatz
Markus Karner
Hans Kosina
Gregor Meller
Goran Milovanovic
Mihail Nedjalkov
Roberto Orio
Vassil Palankovski
Mahdi Pourfath
Franz Schanovsky
Philipp Schwaha
Franz Stimpfl
Viktor Sverdlov
Oliver Triebl
Stanislav Tyaginov
Martin-Thomas Vasicek
Stanislav Vitanov
Paul-Jürgen Wagner
Thomas Windbacher

Philipp Hehenberger
Dipl.-Ing.
hehenberger(!at)iue.tuwien.ac.at
Biography:
Philipp Hehenberger was born in Vienna, Austria, in 1980. He studied technical physics at the Technische Universität Wien, where he received the degree of Diplomingenieur in December 2006. He joined the Institute for Microelectronics in January 2007, where he is currently working on his doctoral degree. His current scientific interests include device modeling of hot carrier effects.

Modeling and Simulation of Bias Temperature Instability and Hot Carrier Effects

Shrinking device geometries and increasing clock frequencies result in numerous difficulties when developing and manufacturing new semiconductor technologies. Decreased channel lengths and thinner gate oxides both result in higher electric fields. Moreover, increasing operating temperatures due to rising power dissipation not only cause shifts in the device parameters, but may also severely reduce device lifetime. Device modifications and the employment of new materials are the most important means of maintaining control over these degradation parameters.
Bias Temperature Instability (BTI) mainly affects MOSFETs at elevated temperatures which have a large negative (NBTI) or positive (PBTI) voltage applied to the gate and the other terminals grounded. As a result of this stress condition, there is a shift in the threshold voltage. The interruption of the stress phase leads to relaxation effects. The physics behind BTI are not yet fully understood, even though it has been a very well known as a degradation phenomenon for decades. Existing theoretical BTI models normally describe only the stress phase. A universal model taking both stress and relaxation into consideration is still under construction.
The second degradation mechanism mentioned here is caused by high electric fields near the drain region while a high voltage is additionally applied to the drain contact: The Hot Carrier (HC) effect is based on drifting carriers in the channel, which become high energetic, so-called hot carriers that are sometimes injected into the gate oxide. The defects created by this process are supposed to be similar to the defects originating from the above mentioned BTI. Hence, a similar approach to modeling both reliability issues can be found in the literature. However, the strong field dependence of HCI poses serious difficulties to modeling.
For the development of any model, accurate and reliable measurements are of particular importance. In order to be able to compare measurement data, identical measurement conditions are a basic necessity. Although this may sounds very elementary, no standardized measurement specifications yet exist. DC-stress is often used because of its simplicity, but is disadvantageous due to its poor applicability to real-world situations. Numerous possible variations of pulsed stress routines and ultra fast pulsed stress measurements are becoming popular, as they include information on duty cycle characteristics. Therein lies the key to the physical carrier behaviour of stress and relaxation in short- and ultrashort-time ranges (around 1us). In addition, reducing measurement readout times helps to minimize undesired recovery during the measurement phase. With knowledge of not only long, but also the above-mentioned short-term behavior, a physical model of fundamental significance can be developed.


Switching between stress (+4 V) and threshold voltage extraction phase (between 0 V and -1 V) should be carried out as quickly as possible, in order to avoid undesired relaxation effects.


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