Tunneling effects are crucial not only for MOS transistors but also for
non-volatile semiconductor memory devices. In contrast to volatile memory
devices they retain the stored information without external power supply. NVM
devices can be read and programmed like random-access memory (RAM) devices,
have a low power consumption, are mechanically robust, and offer the
possibility of large-scale integration. They constitute about 10% of the
total semiconductor memory market [268]. However, simulation of such
devices is often carried out using simplified compact
models [269,270,271,272,273,274]. For
the case of stacked gate dielectrics or hot electron injection such models do
not capture the device physics and can reproduce measured data only on a
fit-formula level. In this section some examples of conventional EEPROM and
alternative devices will be studied using the tunneling models described
above.
Subsections
A. Gehring: Simulation of Tunneling in Semiconductor Devices
