References
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References
- 1
-
TCAD framework architecture.
Semiconductor Research Corporation publication S90013, (Also
available as CAD Framework Initiative document TCAD-90-T-1), May 1990.
- 2
-
R. Alvis, S. Luning, and L. Thompson.
Physical characterization of two-dimensional doping profiles for
process modeling.
In Third Int'l Workshop on the Measurement and Characterization
of Ultra-Shallow Doping Profiles in Semiconductors, pages 7.1-7.11, 1995.
- 3
-
N.D. Arora, R. Rios, C.L. Huang, and K. Raol.
PCIM: A physically based continuous short-channel IGFET model for
circuit simulation.
IEEE Transactions on Electron Devices, 41:988-997, 1994.
- 4
-
V. Axelrad, Y. Granik, and R. Jewell.
The virtual IC factory as an integrated TCAD user environment.
In F. Fasching, S. Halama, and S. Selberherr, editors, Technology CAD Systems, pages 293-307, 1993.
- 5
-
Y. Bard.
Comparison of gradients methods for the solution of nonlinear
parameter estimation problems.
Journal of the Society of Industrial and Applied Mathematics
(SIAM), pages 157-187, July 1970.
- 6
-
Y. Bard.
Nonlinear Parameter Estimation.
Academic Press, New York, 1976.
- 7
-
D. M. Bates and D. G. Watts.
Nonlinear Regression Analysis and its Applications.
John Wiley & Sons, New York, 1988.
- 8
-
D.M. Betz.
XLISP: An object-oriented LISP, version 2.1, 1989.
- 9
-
G. Bischoff and J. P. Krusius.
Technology independent device modeling for simulation of integrated
circuits for FET technologies.
IEEE Transactions on Computer-Aided Design, 4(1):99-110,
1985.
- 10
-
D. Boning, G. Chin, W. Dietrich, S. Duvall, M. Giles, R. Harris, M. Karasick,
N. Khalil, M. Law, M. J. McLennan, P.K. Mozundar, L. Nackman, S. Nassif, V.T.
Rajan, D. Shroeder, R. Tremain, D.M.H. Walker, R. Wang, and A. Wong.
Developing and integrating TCAD applications with the semiconductor
wafer representation.
IEEE-NUPAD, 1992.
- 11
-
D.S. Boning and D.A. Antoniadis.
MASTIF - a workstation approach to fabrication process design.
In ICCAD-85 digest of Technical Papers, pages 280-282, 1985.
- 12
-
D.S. Boning, M. L. Heytens, and A.S. Wong.
The intertool profile interchange format: An object-oriented
approach.
IEEE Transactions on Computer-Aided Design, 10(9):1150-1156,
1991.
- 13
-
D.S. Boning, M. B. McIlrath, P. Penfield Jr., and E.M. Sachs.
A general semiconductor process modeling framework.
IEEE Transactions on Semiconductor Manufacturing,
5(4):266-280, 1992.
- 14
-
Carl De Boor.
A Practical Guide to Splines.
Springer-Verlag, New York, USA, 1978.
- 15
-
G. E. P. Box and N. R. Draper.
Empirical Model-Building and Response Surfaces.
John Wiley & Sons, New York, 1987.
- 16
-
K. M. Brown and J.E. Dennis Jr.
Derivative free analogues of the Levenberg-Marquardt and Gauss
algorithms for nonlinear least squares approximation.
Numerical Methods, 18:289-297, 1972.
- 17
-
D.M. Caughey and R.E. Thomas.
Carrier mobilities in silicon empirically related to doping and
field.
Proc. IEEE, page 2192, 1967.
- 18
-
R.M. Chamberlain, M.J. D. Powell, C. Lemarechal, and H. C. Pedersen.
The watchdog technique for forcing convergence in algorithms for
constrained optimization.
In Proc. 10th International Symposium on Mathematical
Programming (Montreal), 1979.
- 19
-
J. G. J Chern, P. Chang, R.F. Motta, and N. Godinho.
A new method to determine MOSFET channel length.
IEEE Electron Dev. Lett., 1:170, 1980.
- 20
-
C. K. Chui.
Multivariate Splines.
Society for Industrial and Applied Mathematics (SIAM), Pensylvania,
USA, 1988.
- 21
-
G.B. Dantzig.
Linear Programming and Extensions.
Princeton University Press, Princeton, N.J., 1963.
- 22
-
J. E. Dennis Jr.
Nonlinear least squares.
In D. Jacobs, editor, The State of the Art in Numerical
Analysis, pages 269-312. Academic Press, London and New York, 1977.
- 23
-
P. Dewolf, T. Clarysse, and W. Vandervorst.
One and two-dimensional carrier profiling in semiconductor by
nano-srp.
In Third Int'l Workshop on the Measurement and Characterization
of Ultra-Shallow Doping Profiles in Semiconductors, pages 32.1-32.9, 1995.
- 24
-
A. Dharchoudhury and S.M. Kang.
Worst-case analysis and optimization of vlsi circuit performance.
IEEE Transactions on Computer-Aided Design, 14(4):481-492,
1995.
- 25
-
K. Doganis and D. L. Scharfetter.
General optimization and extraction of IC device model parameters.
IEEE Transactions on Electron Devices, 30(9):1219-1228, 1983.
- 26
-
S.G. Duvall.
An interchange format for process and device simulation.
IEEE Transactions on Computer-Aided Design, 7(7):741-754,
1988.
- 27
-
R. L. Eubank.
Spline Smoothing and Nonparametric Regression.
Marcel Dekker Inc, New York and Basel, 1988.
- 28
-
F. Fasching, C. Fisher, and S. Selberherr.
VISTA - the data level.
IEEE Transactions on Computer-Aided Design, 13(1):72-81,
1994.
- 29
-
F. Fasching, S. Halama, and S. Selberherr, editors.
Technology CAD Systems.
Springer-Verlag, Wien-New York, 1993.
- 30
-
P.E. Gill, W. Murray, and M. H. Wright.
Practical Optimization.
Academic Press, London, 1981.
- 31
-
C.C. Gonzaga.
Path-following methods for linear programming.
SIAM Rev., 34:167-224, 1992.
- 32
-
S.H. Goodwin-Johansson, R. Subrahmanyan, C.E. Floyd, and H.Z. Massoud.
Two-dimensional impurity profiling with emission computed tomography
techniques.
IEEE Transactions on Computer-Aided Design, 8(4):323-335,
1989.
- 33
-
P. Habas and J. Faricelli.
Investigation of the physical modeling of the gate-depletion effect.
IEEE Transactions on Electron Devices, 39:1496, 1992.
- 34
-
S. Halama.
The Viennese Integrated System for Technology CAD Applications -
Architecture and Critical Software Components.
PhD thesis, Technical University of Vienna, 1994.
- 35
-
S. Halama, F. Fasching, C. Fisher, H. Kosina, E. Leitner, Ch. Pichler,
H. Pimingstorfer, H. Puchner, G. Riger, G. Schrom, T. Simlinger,
M. Stiftinger, H. Stippel, E. Strasser, W. Tuppa, K. Wimmer, and
S. Selberherr.
The viennese integrated system for technology cad applications.
In F. Fasching, S. Halama, and S. Selberherr, editors, Technology CAD Systems, pages 197-236, 1993.
- 36
-
S. Halama, F. Fasching, H. Pmingstorfer, W. Tuppa, and S. Selberherr.
Consistent user interface and task level architecture of a TCAD
system.
In Proceedings NUPAD IV, pages 237-242, 1992.
- 37
-
K. Hasnat, S. Murtaza, and A. F. Tash.
A manufacturing sensitivity analysis of 0.35m LDD MOSFET's.
IEEE Transactions on Semiconductor Manufacturing, 7(1):53-59,
1994.
- 38
-
C.P. Ho and S.E.Hansen.
Suprem-iii: A program for integrated process modeling and simulation.
Technical Report 83-001, Stanford Electronics laboratories, July
1983.
- 39
-
T. Hori.
LATID (large-tilt-angle implanted drain) technology for
3.3-V operation.
In IEDM Tech. Digest, pages 777-780, 1989.
- 40
-
T. Hori, J. Hirase, Y. Odake, and T. Yasui.
Deep-submicrometer large-angle-tilt implanted drain (LATID)
technology.
IEEE Transactions on Electron Devices, 39:2312, 1992.
- 41
-
C.-L. Huang and N.D. Arora.
Characterization and modeling of the n- and p-channel MOSFETs
inversion-layer mobility in the range 25-125c.
Solid-State Electronics, 37:97, 1994.
- 42
-
C.-L. Huang, J. Faricelli, D. A. Antoniadis, N. Khalil, and R. Rios.
An accurate gate length extraction method for sub-quarter micron
MOSFET's.
IEEE Transactions on Electron Devices, 1995.
- 43
-
C.-L. Huang, J. Faricelli, and N. D. Arora.
A new technique for measuring MOSFET inversion layer mobility.
IEEE Transactions on Electron Devices, 40(6):1134-1139, 1993.
- 44
-
C.-L. Huang, N. Khalil, N.D. Arora, B. Zetterlund, and L.A. Bair.
Effects of source/drain implants on short-channel MOSFET I-V and
C-V characteristics.
IEEE Transactions on Electron Devices, 42(7), 1995.
- 45
-
K. Iniewski and C.A.T. Salama.
A new approach to CV profiling with sub-debye-length resolution.
Solid-State Electronics, 34(3):309-314, 1991.
- 46
-
Institute of Microelectronics, Technical University of Vienna, Austria.
MINIMOS 5 - User's Guide, 1991.
- 47
-
H. Ishiuchi, Y. Matsumoto, S. Sawada, and O. Ozawa.
Measurement of intrinsic capacitance of lightly doped drain (ldd)
mosfet's.
IEEE Transactions on Electron Devices, 32:2238, 1985.
- 48
-
H. Jacobs, A.V. Schwerin, D. Scharfetter, and F. Lau.
MOSFET reverse short channel effect due to silicon interstitial
capture in gate oxide.
In IEDM Tech. Digest, pages 307-310, 1993.
- 49
-
W. C. Johnson and P. T. Panousis.
The influence of debye length on the C-V measurement of doping
profiles.
IEEE Transactions on Electron Devices, 18(10):965-973, 1971.
- 50
-
D. P. Kennedy, P. C. Murley, and W. Kleinfelder.
On the measurement of impurity atom distributions by the differential
capacitance technique.
IBM Journal of Research and Development, 12:399-409, 1968.
- 51
-
N. Khalil.
Framework component: Tool control language.
in Semiconductor Research Corporation publication S90013, (Also
available as CAD Framework Initiative document TCAD-90-T-1), May 1990.
- 52
-
N. Khalil and J. Faricelli.
MOSFET two-dimensional doping profile determination.
In S. Selberherr, H. Stippel, and E. Strasser, editors, SISDEP-5, pages 365-368. Springer-Verlag, 1993.
- 53
-
N. Khalil, J. Faricelli, D. Bell, and S. Selberherr.
A novel method for extracting the two-dimensional doping profile of a
sub-half micron MOSFET.
In Digest Symposium VLSI Technology, pages 131-132, 1994.
- 54
-
N. Khalil, J. Faricelli, D. Bell, and S. Selberherr.
The extraction of two-dimensional MOS transistor doping via inverse
modeling.
IEEE Electron Device Letters, 16(1):17-19, 1995.
- 55
-
N. Khalil, J. Faricelli, C.L. Huang, and S. Selberherr.
Two-dimensional dopant profiling of submicron MOSFETs using
nonlinear least squares inverse modeling (invited).
In Third Int'l Workshop on the Measurement and Characterization
of Ultra-Shallow Doping Profiles in Semiconductors, pages 6.1-6.9, 1995.
- 56
-
N. Khalil, C.-L. Huang, J. Faricelli, and S. Selberherr.
Measurements and simulations of short-channel MOSFET I-V and
C-V characteristics.
In preparation for publication in IEEE Transactions on Electron
Devices, 1995.
- 57
-
N. Khalil, G. Nanz, R. Rios, and S. Selberherr.
A b-splines regression technique to determine one-dimensional MOS
doping profiles.
Accepted for publication in Proc. ESSDERC-95, 1995.
- 58
-
S. Kordic, E. Van Leonen, D. Dijkkamp, A. Hoeven, and H. Moraal.
Scanning tunneling microscopy on cleaved silicon pn junctions.
In IEDM Tech. Digest, pages 277-280, 1989.
- 59
-
M. E. Law.
Technology computer-aided design characterization needs and
requirements.
In Third Int'l Workshop on the Measurement and Characterization
of Ultra-Shallow Doping Profiles in Semiconductors, pages 4.1-4.8, 1995.
- 60
-
M.E. Law.
Challenges for achieving accurate three-dimensional process
simulation.
In S. Selberherr, H. Stippel, and E. Strasser, editors, SISDEP-5, pages 1-9. Springer-Verlag, 1993.
- 61
-
K. Levenberg.
A method for the solution of certain nonlinear problems in least
squares.
Quarterly of Applied Mathematics, 2:164-168, 1944.
- 62
-
P. Lloyd.
Application of numerical simulation in the modeling of IC device
structures.
Proceedings of the 3rd Int. Conf. on the Numerical Analysis of
Semiconductor Devices and Integrated Circuits (NASECODE III), pages 16-30,
1983.
- 63
-
P. Lloyd, H. K. Dirks, E.J. Prendergast, and K. Shinghal.
Technology CAD for competitive products.
IEEE Transactions on Computer-Aided Design, 9(11):1209-1216,
1990.
- 64
-
L. Lorenz, C. Hill, H. Jaouen, C. Lombardi, C. Lyden, K. De Meyer, J. Pelka,
A. Poncet, M. Rudan, and S. Solmi.
The STORM technology CAD system.
In F. Fasching, S. Halama, and S. Selberherr, editors, Technology CAD Systems, pages 163-196, 1993.
- 65
-
K.K. Low and S.W. Director.
An efficient methodology for building macromodels of ic fabrication
processes.
IEEE Transactions on Computer-Aided Design, 8(12):1299-1313,
1989.
- 66
-
J. Mar, K. Bhargavan, S. Duvall, R. Firestone, D. Lucey, S. Nandgaonkar, S. Wu,
K.-S. Yu, and F. Zarbakhsh.
EASE - an application-based CAD system for process design.
IEEE Transactions on Computer-Aided Design,
CAD-6(6):1032-1038, 1987.
- 67
-
D.W. Marquardt.
An algorithm for least squares estimation of nonlinear parameters.
Journal of the Society of Industrial and Applied Mathematics
(SIAM), 11:431-441, 1963.
- 68
-
R.L. Mason, R. F. Gunst, and J.L. Hess.
Statistical Design and Analysis of Experiments.
John Wiley & Sons, New York, 1989.
- 69
-
D.Q. Mayne, E. Polak, and A. Sangiovanni-Vincentelli.
Computer-aided design via optimization: A review.
Automatica, 18(2):147-154, 1982.
- 70
-
J. J. More and S. J. Wright.
Optimization Software Guide.
Society for Industrial and Applied Mathematics (SIAM), Pensylvania,
USA, 1993.
- 71
-
S.R. Nassif, A.J. Strojwas, and S.W. Director.
FABRICS II: A statistically based IC fabrication process
simulator.
IEEE Transactions on Computer-Aided Design, 3(1):40-46, 1984.
- 72
-
G. Neubauer, C.C. Williams, and A. Erickson.
2D-scanning capacitance microscopy measurements of cross-sectioned
VLSI devices.
In Third Int'l Workshop on the Measurement and Characterization
of Ultra-Shallow Doping Profiles in Semiconductors, pages 44.1-44.8, 1995.
- 73
-
R.G. Newton.
Inverse problems in physics.
SIAM Rev., 12(3):346-356, 1970.
- 74
-
E.H. Nicollian and J. R. Brews.
MOS Physics and Technology.
John Wiley & Sons, New York, 1982.
- 75
-
SWR Working Group of the CFI/TCAD TSC.
Semiconductor wafer representation architecture document v1.0.
CAD Framework Initiative Document TCAD-91-G-1, JUL 1992.
- 76
-
J. K. Ousterhout.
Tcl and the Tk Toolkit.
Addison-Wesley, Reading, Massachussets, 1994.
- 77
-
G. J. L. Ouwerling.
Nondestructive One- And Two-Dimensional Doping Profiling By
Inverse Methods.
PhD thesis, Delft University of Technology, 1989.
UMI, Ann Arbor MI.
- 78
-
C. Park, K. M. Klein, A. F. Tasch, and J. F. Ziegler.
Critical angles for channeling of boron ions implanted into
single-crystal silicon.
Journal of Electrochem. Soc., 138:2107-2115, 1991.
- 79
-
Ch. Pichler, N. Khalil, G. Schrom, and S. Selberherr.
TCAD optimization based on task-level framework services.
Accepted for publication in Proc. SISDEP-95, 1995.
- 80
-
Ch. Pichler and S. Selberherr.
Process flow representation within the VISTA framework.
In S. Selberherr, H. Stippel, and E. Strasser, editors, SISDEP-5, pages 25-28. Springer-Verlag, 1993.
- 81
-
H. Pimingstorfer, S. Halama, S. Selberherr, K. Wimmer, and P. Verhas.
A technology CAD shell.
In W. Fichner and D. Aemmer, editors, SISDEP-4, pages 409-416,
1991.
- 82
-
M.J. D. Powell.
A fast algorithm for nonlinearly constrained optimization
calculation.
In Proc. of the 1977 Dundee Conference on Numerical Analysis,
June 1977.
- 83
-
E. J. Prendergast.
An integrated approach to modeling.
Proceedings of the 4th Int. Conf. on the Numerical Analysis of
Semiconductor Devices and Integrated Circuits (NASECODE IV), pages 83-97,
1985.
- 84
-
W. H. Press, S. A. Teukolsky, W. T. Vettrling, and B. P. Flannery.
Numerical Recipes.
Cambridge University Press, New York, USA, 1992.
- 85
-
C.S. Rafferty, H.H. Vuong, S.A. Eshraghi, M.D. Giles, M.R. Pinto, and S.J.
Hillenius.
Explanation of reverse short channel effect by defect gradient.
In IEDM Tech. Digest, pages 311-314, 1993.
- 86
-
J.G. Reich.
C Curve Fitting and Modeling for Scientist and Engineers.
McGraw-Hill, New York, USA, 1992.
- 87
-
R. Rios and N. D. Arora.
Determination of ultra-thin gate oxide thickness for CMOS
structures using quantum effects.
In IEDM Tech. Digest, pages 613-616, 1994.
- 88
-
R.Y. Rubinstein.
Simulation and the Monte-Carlo Method.
John Wiley & Sons, New York, USA, 1981.
- 89
-
A. Sabinis and J. Clemens.
Characterization of the electron mobility in the inverted
Si-surface.
In IEDM Tech. Digest, pages 18-21, 1979.
- 90
-
M. Seavey, J. Faricelli, N. Khalil, G. Nanz, L. Richardson, C. Schiebl,
H. Soleimani, and M. Thurner.
Numerical device and process simulation tools in transistor design.
Digital Technical Journal, 4(2):25-38, 1992.
- 91
-
S. Selberherr.
Analysis and Simulation of Semiconductor Devices.
Springer-Verlag, Wien-New York, 1984.
- 92
-
S. Selberherr, A. Schütz, and H. W. Pötzl.
MINIMOS: A two-dimensional MOS transistor analyzer.
IEEE Transactions on Electron Devices, 27(8):1770, 1980.
- 93
-
M. Sharma and N.D. Arora.
OPTIMA: A nonlinear model parameter extraction program with
statistical confidence region algorithms.
IEEE Transactions on Computer-Aided Design, 12:982-986, 1993.
- 94
-
M. R. Simpson.
PRIDE: An integrated design environment for semiconductor device
simulation.
IEEE Transactions on Computer-Aided Design, 10(9):1163-1174,
1991.
- 95
-
C.J.B. Spanos and S.W. Director.
Parameter extraction for statistical IC process characterization.
IEEE Transactions on Computer-Aided Design, 5(1):66-78, 1986.
- 96
-
R. Spence and R. S. Soin.
Tolerance Design of Electronic Circuits.
Addison-Wesley, London, 1988.
- 97
-
G. L. Steel Jr.
Common LISP.
Digital Press, Bedford, Massachussets, 1984.
- 98
-
R. Subrahmanyan, H.Z. Massoud, and R.B. Fair.
Experimental characterization of two-dimensional dopant profiles in
silicon using chemical staining.
Applied Physics Letters, 52(25), 1988.
- 99
-
S. Sun and J. Plummer.
Electron mobility in inversion and accumulation layers on thermally
oxidized silicon surfaces.
IEEE Transactions on Electron Devices, 27:1497-1508, 1980.
- 100
-
A. Tarantola.
Inverse Problem Theory.
Elsevier, Amsterdam, 1987.
- 101
-
A. Tarantola and B. Valette.
Inverse problem = quest for information.
Journal of Geophysics, 50:159-170, 1982.
- 102
-
A. F. Tasch, H. Shin, C. Park, J. Alvis, and S. Novack.
An improved approach to accurately model shallow B and BF
implants in silicon.
Journal of Electrochem. Soc., 136:810-814, 1989.
- 103
-
Y. Taur, D.S. Zicherman, D.R. Lombardi, C.H. Hsu P.J. Restle, H.I. hanafi, M.R.
Wordeman, D. Davari, and G.G. Shahidi.
A new shift and ratio method for MOSFET channel-length extraction.
IEEE Electron Dev. Lett., 13:267, 1992.
- 104
-
K. Terada and H. Muta.
A new method to determine effective MOSFET channel length.
Jap. J. App. Physics, 18:953, 1979.
- 105
-
G. Wahba.
Spline Models for Observational Data.
Society for Industrial and Applied Mathematics (SIAM), Pensylvania,
USA, 1990.
- 106
-
A.T. Watson, P.C. Richmond, P.D. Krieg, and T.M. Tao.
A regression-based method for estimating relative permeabilities from
displacement experiments.
SPE Reservoir Engineering, pages 953-958, August 1988.
- 107
-
R.G. Wilson.
Boron, fluorine, and carrier profiles for B and BF implants
into crystaline and amorphous Si.
Journal of Applied Physics, 54, 1985.
- 108
-
A.S. Wong and A. R. Neureuther.
The intertool profile interchange format: A technology CAD
environment approach.
IEEE Transactions on Computer-Aided Design, 10(9):1157-1162,
1991.
- 109
-
C.P. Wu, E.C. Douglas, and C.W. Mueller.
Limitations of the CV technique for ion-implanted profiles.
IEEE Transactions on Electron Devices, 22(6):319-329, 1975.
- 110
-
P. Yang and P.K. Chatterjee.
Statistical modeling of small geometry MOSFETs.
In IEEE Int. Electron. Devices Meeting, pages 286-289, 1982.
- 111
-
P. Yang, D.E. Hocevar, P.F. Cox, C. Machala, and P.K. Chatterjee.
An integrated and efficient approach for MOS VLSI statistical
circuit design.
IEEE Transactions on Computer-Aided Design, 5(1):5-14, 1986.
- 112
-
Y.-T. Yeow.
Measurement and numerical modeling of short-channel MOSFET gate
capacitance.
IEEE Transactions on Electron Devices, 35:2510, 1987.
Martin Stiftinger
Tue Aug 1 19:07:20 MET DST 1995