Charge noise is inevitable during device operation and thus can also be seen in electrical characterization. It occurs in different forms on both large area devices and scaled devices. On scaled devices, there are discrete steps in the measured drain-source current , which correspond to charge capture and emission events of single defects. On large area devices, thousands of such charge capture and emission events take place simultaneously. Therefore in large devices discrete steps are not visible anymore, however, the superposition of the defects can be observed as 1/f noise.
In the following first the experimental characterization and the theoretical models describing charge noise in the frequency domain are introduced. Afterwards, algorithms for detecting and extracting the step heights and capture and emission time distributions are explained before measured RTN at cryogenic temperatures will be analyzed for different technologies.
Experimentally, charge noise characterization on a MOSFET is straight-forward: A constant voltage is applied at the gate of the DUT, and the drain-source current is recorded for a defined period using an equidistant sampling scheme. Using an initially measured () curve, the current signal can be mapped to an equivalent signal. Active charge traps can capture and emit charges which can be seen as discrete steps in the recorded current and the corresponding curve. This is shown on four exemplary traces in Fig. 7.1 (left).
Such traces can be recorded for various gate voltages and temperature conditions. This allows to determine the dependence of different parameters such as mean charge capture and emission times or mean step heights on and . By varying the sampling frequency from high to low frequencies, defects with high and low capture and emission rates can be accessed.