Modeling of Defect Related Reliability Phenomena
in SiC Power-MOSFETs

1.3 State of the Art, Motivation and Outline

With the application of the NMP theory for oxide and interface defects in MOS devices in combination with device simulation in modern TCAD frameworks, charge trapping has been identified as the main mechanism responsible for BTI as well as TAT in mature Si based technologies. The investigation of single charge transfer events in small area devices allowed to consistently link these reliability threats to RTN and potential defect candidates that are responsible for charge trapping have been identified by parameter comparison with those obtained from ab-initio calculations. With many electrically active defects at the SiC/SiO₂ interface and an increased number of potential defect candidates due to the enhanced stoichiometric complexity compared to Si-based MOSFETs, electrically measured shifts of the threshold voltage have not been linked to defect parameters and compared with such derived by ab-initio methods for SiC based devices yet. BTI in SiC MOSFETs, so far, has only been described by empirical power-law interpolation, completely lacking a physical interpretation. A more advanced approach by using activation energy maps can also not connect BTI to a specific physical mechanism and therefore create a link between the data and a potential defect candidate even though charge trapping is widely acknowledged as the main reason for BTI in SiC MOSFETs.

Therefore, in this work, BTI as well as TAT observed in different SiC/SiO₂ MOS structures is characterized and reproduced by employing an efficient simulation framework with a physical charge trapping model. The obtained defect parameters are then compared to those calculated by ab-initio methods.

This Chapter 1 has provided an overview of the benefits of using SiC as substrate material in power MOSFETs at medium to high voltage classes by laying out its material properties. SiC MOSFET processing and state of the art architectures are briefly discussed, followed by the introduction of the most relevant reliability threads in MOSFETs in general and in particular due to the detriments of the SiC/SiO₂ interfacial region compared to the mature Si/SiO₂ system.

In Chapter 2 of this work, experiments to extract the charge transfer kinetics by electrical characterization methods are discussed with a special focus on the peculiarities that arise when applying methods established in Si technologies to SiC MOSFETs.

Chapter 3 contains an overview of defect candidates that have been identified in both bulk oxide and the transition region to bulk SiC with ab-initio methods. Suspected defect candidates that are located in the transition layer between these two materials include such that potentially form due to the introduction of N containing precursors during the interface annealing process step.

Within Chapter 4, the NMP model, which has widely been established for describing charge transfer reactions at defects in Si, SiGe and novel two-dimensional material based MOSFETs, is reviewed. One focus is put on the defect parameter extraction using the novel Effective Single Defect Decomposition (ESiD) method which enables to find defect parameters efficiently based on a non-negative least squares optimization scheme. The application of this optimized method becomes a necessity due to the large number of defect candidates in the oxide and in the transition layer at the SiC/SiO₂ interface, resulting in an significantly enhanced defect parameter space, compared to the Si/SiO₂ system. Furthermore, an efficient modeling approach will be introduced to describe charge transfer reactions between a reservoir and a defect as well as between two defects. This extension is essential for the simulation of TAT currents with percolation paths involving multiple defects. The two different non-adiabatic reactions can be described with a single defect parameter set that can be consistently converted into each other. After discussing the limitations of this novel model, the incorporation into trap-assisted tunneling current calculations in MOS stacks will be presented. With this model implemented in Comphy, the relevance of defect to defect charge transfer will be explored in parameter space for a hypothetical defect band in SiC/SiO₂.

Finally, the results of the investigations conducted in this thesis are presented in Chapter 5. First, shifts extracted via various BTI degradation measurements on large area lateral test structures are modeled for the first time with a set of physical defect parameters with the two-state NMP transition rates as implemented in the reliability simulator Comphy. Afterwards the defect parameters are compared to such extracted on Si based MOSFETs and vertical channel (trench) SiC MOSFETs. By making use of the efficiency of the ESiD approach to handle a large set of data for defect parameter extraction, a comparison of three DMOS technologies is demonstrated, with both DC and application relevant bipolar AC stress signals. Details of SiC MOSFET specific degradation, e.g. accelerated charge emission at higher temperature leading to seemingly smaller and the increased stability of bipolar gate bias operation, are explored by the calibrated simulation framework. An extrapolation of and R_on up to typical device lifetimes of about ten years at room temperature and medium oxide fields based on the extracted parameters at stress conditions is shown at operating bias and temperature for static AC signals.

Additionally, TAT currents are modeled in SiC/SiO₂ stacks as well as Metal Insulator Metal (MIM) capacitors employing ZrO₂ as insulating layer for different regimes of TAT. The simulations reveal details of the tunneling mechanisms, such as spatial and energetic resolution of conduction via the traps. Finally, the parameters obtained thereby are compared to those computed with DFT for polarons in both binary oxides.

Both novelties, the first-time defect-centric modeling of BTI data in SiC/SiO₂ MOSFETs and TAT currents in the same system employing the NMP model with increased accuracy compared to previous methods demonstrate the advantage of using physical defect parameters that can be compared to ab-inito calculated parameters of the electrically active structural defects. At the same time, the efficiency necessary to handle large defect ensembles when compared to empirical modeling approaches can be maintained with the ESiD algorithm.

A concluding chapter and an outlook are finally presented. Possible applications and extensions of the hereby presented novel modeling methods are outlined.