Predictive and Efficient Modeling of Hot Carrier Degradation with Drift-Diffusion Based Carrier Transport Models
5.7 Role of Cold Carriers in HCD
In order to study if the effect of cold carriers can be neglected at such high voltages as 16 V the profiles were calculated for the nLDMOS device without the contribution of the MC-mechanism, see Figure 5.21. One can see that the channel peak disappears if the MC-process is ignored. This behavior can be easily explained because carriers near the source are close to equilibrium, and therefore the carriers near the channel have moderate energies which are not enough to trigger the SC-mechanisms.
The important issue which needs to be addressed in more detail is whether the effect of cold carriers can be neglected in nLDMOS devices stressed at high voltages. This effect is twofold: the population of cold carriers is described by the second term of the energy distribution function (see Equation 4.22 ) and these low-energetic particles contribute to HCD via the MC-mechanism. To analyze the role of the first aspect, the drain DFs obtained with ViennaSHE and with the DD-based model excluding the term for cold carriers in the DF expression Equation 4.22 were calculated for two different drain voltages of 20 and 22 V, see Figure 5.22. One can see that at moderate and high energies the agreement is very good while for low energies the Maxwellian tails visible in SHE-based DFs are not reproduced by the DD-based method.
To check if this omission in the DFs at low energies translates into changes in the linear and saturation drain current degradation, and curves calculated without the effect of cold carriers for = 2 V and = 18 and 22 V are plotted, see Figures 5.23 and 5.24. These degradation curves are evaluated using the same parameter set as those obtained with the “full” model. One can see that at short stress times neglecting the cold carrier contribution does not affect HCD, while at times longer than 5 ks the drain current change is substantially underestimated. This is because short term HCD is determined by the drain peak which is visible already at 10 s, see Figure 5.21. In this device area carriers are rather hot, and therefore both SC- and MC-mechanisms are coupled and have high rates. Thus, ignoring the contribution of cold carriers does not change the and traces.
With increasing stress time the drain peak becomes broader, i.e. HCD propagates into the device. However, at these times a substantial contribution is made to the degradation by the growing peaks inside the channel and the bird’s beak, see Figure 5.21. The peak in the channel is determined by the MC-process (in combination with the bond breakage energy reduction due to the field-dipole interaction). Suppressing either the cold carrier fraction effect or the MC-process contribution leads to an underestimation of HCD at moderate and long stress times. This leads to the conclusion that even in the case of high-voltage devices the cold carrier contribution cannot be omitted.
The cold carriers in the drain region, having a very high occupation probability, cannot be represented if the second term corresponding to the cold carriers in Equation 4.22 is omitted, see Figure 5.22. Note that the DF in Figure 5.22 was evaluated by just setting the cold carrier coefficient to zero without further renormalization (i.e. the area under the DF curve no longer represents the local carrier concentration). This can severely affect the predictive capability of the HCD model.
Figures 5.23 and 5.24 show and obtained from the HCD model considering both SC- and MC-processes but ignoring the second term in Equation 4.22 corresponding to the cold carriers for two stress conditions, i.e. = 2.0 V and = 18 and 22 V. Interestingly, the drain current degradation is not dramatically affected at short stress times by the second term, but at high stress times, where other processes have nearly saturated, the consideration of cold carriers in the drain region results in a significant difference of and . Figures 5.23 and 5.24 also show the importance of the MC-process in the HCD model.
The rate of the MC-process, as already discussed, is determined by Equation 4.29, where the threshold energy is the distance between the Si-H bond vibrational levels and is 0.25 eV [139, 140]. As for the SC-process, which has an activation energy of 2.5 eV, the corresponding rate is not significantly affected if the DFs with the omitted cold carrier term are used, as opposed to the rate of the MC-mechanism.
As can be seen in Figure 5.23 , the HCD model considering just the SC-process fails to describe . In the nLDMOS transistor short-term HCD is determined by the drain peak. Near the drain, the carriers are rather hot, and therefore one may expect that if the effect of cold particles is neglected, the corresponding peak and changes of the device characteristics at short stress times will not be affected. Figure 5.23 shows, however, that this is only partially true and neglecting the MC-mechanism leads to severe
underestimation of both and at short stress times and for both combinations of and . This originates from the fact that hot carriers contribute also to the MC bond breakage process. Let us consider an electron which has gained an energy of 1.4 eV. This electron cannot trigger the SC-process which has an activation energy of 1.5 eV [139, 140] but it can excite the bond to a higher energy level. Now the remaining bond breakage energy needed to desorb the hydrogen atom is 0.1 eV and the probability of finding carriers with this energy or above is very large. Therefore, it is concluded that in the drain area the MC- and SC-processes are strongly coupled and neglecting the former mechanism leads to spurious and results.
As for the role of the low energy fraction of the carrier ensemble in the context of the drain peak, the contribution of these particles is screened by those electrons which have higher energies. Therefore, if the cold carrier term in the DF expression is omitted, the drain peak is not impacted and the error in the and values is visible at stress times of 3 ks and longer. An additional factor which is also responsible for this HCD underestimation is due to the fact that the cold carriers (together with the field-dipole lowering of the activation energy) are responsible for the channel peak which contributes to HCD also in the case of long stresses [26, 147].
Finally, is shown neglecting the MC-process in the HCD model in Figure 5.25 for the pLDMOS transistor. Again, an underestimation of degradation is observed if the MC-process is not included. Since at such high stress voltages as = -50 V the concentration of hot carriers is higher than compared to the nLDMOS device, the underestimation is not as severe. As the stress time increases, the discrepancy reduces due to the increase in the number of hot carriers and the SC-process dominates at longer stress times. Neglecting the cold carrier term in Equation 4.22 does not affect the DF and the HCD in the pLDMOS as the cold carrier concentration is not very high in this device at stress voltages of = -50 V and = -1.5 and -1.7 V.
To conclude, in this section the physical model of HCD is applied to represent the degradation in nLDMOS and pLDMOS transistors. Two versions of the model have been examined, i.e. a version which employs the carrier distribution functions obtained from a deterministic Boltzmann transport equation solver and one which uses the simpler drift-diffusion approach. The electron DFs determined with the DD-based model were compared with those simulated with the SHE approach and good agreement between them was shown. Although some discrepancy between the DFs computed with these two models is visible in the drain region, this discrepancy was shown to not translate into a significant error in the degradation traces. Such a conclusion can be drawn based on the good agreement between the carrier acceleration integrals evaluated with the two versions of the model for both single- and multiple-carrier processes of Si-H bond dissociation. The corresponding interface state density profiles are also almost identical for a wide range of stress times and stress conditions. The degradation of the linear and saturation drain currents as well as the threshold voltage shift were properly represented by both versions of the model for different combinations of drain and gate voltages using a unique set of parameters. Good agreement between the results obtained with the SHE- and DD-based methods suggests that the computationally efficient drift-diffusion model is well suited for describing the hot-carrier degradation in LDMOS devices. This makes the DD-based model attractive for predictive HCD simulations of LDMOS transistors.
Using the physics-based model for hot-carrier degradation (Section 4.3 and 4.4), the role of colder carriers in HCD of n- and p-channel LDMOS transistors is also investigated. The effect of cold carriers on HCD is twofold: these carriers contribute to the low energy fraction of the carrier energy distribution function and also trigger the multiple-particle process of Si-H bond dissociation. As a result, the drift-diffusion scheme is more feasible for analysis of the role of cold carriers in HCD since the analytic formula for the distribution function contains two terms, i.e. the one which represents the hot carrier fraction of the statistical ensemble and the second one which models the thermalized cold carriers. If the multiple-carrier process rate is neglected, and are severely underestimated in both LDMOS transistors. Note that this trend is especially pronounced at short stress times. It has been shown that short-term HCD is determined by the drain [26, 147]. In the drain the carriers are hot enough and have a high concentration. As a result, both single- and multiple-carrier processes of bond dissociation are strongly coupled. For instance, those carriers with energies slightly below the Si-H bond breakage activation energy can excite the bond, therefore contributing to the multiple-carrier process. If the bond is excited by this process, a substantially lower energy is needed to trigger the bond rupture event. Therefore, ignoring the MC-process rate can also impact the rate of the SC-mechanism. In addition, the common effect of cold carriers with the bond weakening due to the field-dipole interaction leads to a channel peak which also contributes to HCD at longer stress times. Finally, it is important to emphasize that all trends are the same for both n- and p-channel devices and that for both transistors a unique set of model parameters has been used.