2 The Effect of Nondegenerate Gate on MOS Device Characteristics



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2 The Effect of Nondegenerate Gate on MOS Device Characteristics

 

It is known for a long time that the penetration of the electric field into metal electrodes produces an increased barrier attenuation in addition to the Schottky barrier lowering [306][303][31]. This effect originates from a nonzero length necessary to reduce the electric field from a surface field to zero field which normally holds inside the metal. This phenomenon can even predominate over the Schottky effect at very high fields [433]. The characteristic penetration depth is given with the Debye length in the degenerate case

 

where is the free electron concentration and the Fermi level in the metal, the absolute permittivity of the metal and the effective electron mass. and are the Fermi integrals of order and , respectively. The Boltzmann constant is denoted by , is the absolute temperature and the reduced Planck constant. The surface band-bending , due to the penetration of the electric field , becomes . For example: assuming an Au electrode with , one obtains . For , it follows . Note that in this case, since the calculated is much smaller than an average distance between atoms (), formula 2.1 may be considered only as an approximation for the penetration depth.

The same field-penetration effect occurs in the gate of MOS devices. The conventional gates are usually heavily doped by diffusion from POCl. As a consequence, the described band-bending effect is negligible [119]. Unlike conventional gates, implanted polysilicon gates, as typically used in modern design, may be nondegenerately doped, depending on the process conditions. If the implanted gate is not doped to degeneracy, it can no longer be assumed to be an equipotential area in the analysis of the electrical properties of MOS devices. This is especially true when modeling thin oxide devices, since the depletion capacitance in the polysilicon gate then becomes comparable with the oxide capacitance.

Nondegenerately doped gates produce several effects on MOS device characteristics: distortion of the high-frequency (HF) and the quasi-static (QS) - characteristics (including shift of the flat-band and the threshold voltage) and a reduction of the inversion-layer charge and therefore, the drain current. The latter effect suggests that the driving capabilities of implanted-gate devices are reduced in comparison with ones with degenerate gates. These effects have been experimentally investigated in [520][512][449][371][346][281][275][274][269][188][28] and modeled analytically in [520][165] and numerically in [486][226][167][166][163]. In addition, it is necessary to account for the reduction of the oxide field due to the voltage drop on the polysilicon gates in an analysis of Fowler-Nordheim tunneling [453][132][131], time-dependent dielectric breakdown (TDDB) [501] and band-to-band tunneling, because these effects are influenced exponentially by the electric field. For example: neglecting the gate depletion can result in a serious overestimation of the oxide life-time extracted in the TDDB measurements [501].

The gate-depletion effect is an essentially parasitic effect and our primary aim is to suppress it. During the study of gate depletion we found, however, that the physical phenomena involved in shallow heavily doped space-charge regions pose difficult problems in accurately modeling. Solving these problems is quite important not only from a scientific point of view, but also to model bulk at higher doping levels in future very small devices. Therefore, we have studied the gate-depletion effect in much more detail as would be necessary to evaluate this parasitic effect on an engineering level.

This chapter is devoted to the analysis of the impact of the non-equipotential gate on the electrical properties of MOS devices. In the first section, the gate-design issues are reviewed for submicrometer MOS technologies with emphasis on the redistribution and the activation of impurities in the implanted polysilicon gates. The second section deals with one-dimensional analytical modeling of the polysilicon-gate/oxide/silicon structure. Comparison between model and measurements, as well as physical phenomena responsible for disagreements observed, are covered by the third section. Numerical analysis of MOSFETs with implanted gates is elaborated on in the fourth section.





next up previous contents
Next: 2.1 Dual Gate CMOS Up: PhD Thesis Predrag Habas Previous: 1 Introduction



Martin Stiftinger
Sat Oct 15 22:05:10 MET 1994