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Chapter 9 Summary and Outlook

This thesis introduces a set of newly developed geometry-aware algorithms for hierarchical grids which are centered around identifying and utilizing the discrete surface curvatures of topographies arising in semiconductor process TCAD simulations to optimize computational processing. These geometry-aware algorithms significantly increase the performance of topography simulations by selectively refining or simplifying the discrete representation of the device topography during a simulation.

The three most prominently used discrete surface representations during topography simulations were introduced; level-set functions, surface meshes, and point clouds. Furthermore, the most common ways of switching between these surface representations and their role during topography simulations were discussed. The primary numerical methods used during a topography simulation were considered: The representation of materials on the wafer surface, the evolution of these materials in time (i.e., the level-set method), and three strategies for estimating the surface flux. These discussed methods were then combined into a general workflow for topography simulations. Finally, the concept of the surface curvature on continuous surfaces was discussed, as well as several strategies of how to use this concept on the previously discussed discrete surface representations.

The surface curvatures of the discretized surfaces were used to formulate an automatic feature detection algorithm which detects parts of a discrete surface with significant geometric variation. For 3D level-set functions three methods from the literature and a novel extension of the standard calculation method of the surface curvatures have been investigated for their applicability in topography simulations. Two methods stood out, depending on the quality requirements of the feature detection. For performance oriented applications the Shape Operator method is superior to all other methods. This method uses the smallest finite difference stencil to calculate the mean curvature of the level-set function, while avoiding the calculation of the Gaussian curvature for a robust feature detection. The second method is the novel Big Stencil method, which has a similar computational performance to the other tested methods, yet it has a higher numerical accuracy and is less susceptible to numerical noise. Additionally, a feature detection parameter for topography simulations has been obtained through a parameter study performed on typical device topographies.

The feature detection algorithm and feature detection parameter were used to guide a hierarchical grid placement algorithm to refine the simulation domains of topography simulations. Due to the detected features of the device topography, the hierarchical grid placement algorithm was able to precisely place sub-grids at parts of the simulation domain that improve the discrete description of the topography, while minimizing impacts on simulation performance. This hierarchical approach has been used to simulate selective epitaxial growth of \(\mathrm {SiGe}\) crystals, which leads to an improvement in computation time, while maintaining an accurate description of the crystal surface.

Furthermore, the feature detection algorithm has been used to improve Monte Carlo ray tracing based surface flux calculations on surface meshes. The detected features have been used to split the surface mesh into two separate regions which are used to guide a surface mesh simplification algorithm. Depending on the previously calculated regions, the surface mesh simplification algorithm is able to remove more or less triangles from the original surface mesh. Additionally, the quality of the triangles between the regions is taken into consideration to create a steady increase in the size of the triangles to prevent the formation of bad mesh elements. This approach maximizes the amount of triangles that are removed from the surface mesh, while maintaining a detailed description of its features.

A specially designed feature detection algorithm for etching simulations of thin material layers utilizing Boolean operations has been developed. This algorithm analyzes the thickness of the material layers that are affected by an etching simulation and determines a minimal required refinement level. Thus, it prevents the formation of numerical artifacts as a consequence of a too coarse resolution of the simulation domain. The computational performance of the algorithm is further improved by dynamically increasing the resolution of the final sub-grid to reach the previously determined minimal required refinement level.

Some possible, future extensions of the geometry-aware algorithms introduced in this work for topography simulations are discussed in the following paragraphs. Monte Carlo ray tracing based surface flux calculations introduce numerical noise into the discrete surface description. This noise prevents more straightforward implementations of feature detection strategies from accurately detecting the features of the surface. The Big Stencil method is able to ignore surface noise introduced by the process model and the finite difference scheme used to solve the level-set equation. Thus, the Big Stencil method could be able to only detect features of the topography and ignore the noise from Monte Carlo based simulations. Furthermore, finite difference schemes with even bigger finite difference stencils could be investigated, which may lead to a more reliable feature detection on surfaces with noise.

The introduced feature detection algorithm can be used to speed up Monte Carlo ray tracing based surface flux calculations on point clouds. In this case, the features of the device topography can be detected with the help of the implicitly defined level-set function, thus redistributing the expensive curvature calculations on point clouds to their computationally cheaper calculations on level-set functions. The detected features could then be further used to simplify the point cloud during its extraction from the level-set function.

The initial motivation of the feature detection algorithm and hierarchical grid placement algorithm described in this work was to improve simulation performance of topography simulations by selectively refining the simulation domain at features of the topography. Clearly, the feature detection and hierarchical grid placement steps introduce an overhead into a topography simulation, which is evidently small enough to improve simulation performance. However, it is possible that for particularly complex topographies the amount of required sub-grids is so high that the overhead of the hierarchical approach exceeds the performance gains. Thus, it can be of interest to develop a heuristic that determines if a simulation should use a certain amount of grid levels and sub-grids or use a higher base grid resolution with fewer grid-levels.

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Own Publications

Journal Articles
  • [1] Lenz, C., Aguinsky, L. F., Hössinger, A., Weinbub, J., “A Complementary Topographic Feature Detection Algorithm Based on Surface Curvature for Three-Dimensional Level-Set Functions”. In: Journal of Scientific Computing 94 (2023), p. 21. doi: 10.1007/s10915-023-02133-5.

  • [2] Lenz, C., Manstetten, P., Aguinsky, L. F., Rodrigues, F., Hössinger, A., Weinbub, J., “Automatic Grid Refinement for Thin Material Layer Etching in Process TCAD Simulations”. In: Solid-State Electronics 200 (2023), p. 108534. doi: 10.1016/j.sse.2022.108534.

  • [3] Lenz, C., Toifl, A., Quell, M., Rodrigues, F., Hössinger, A., Weinbub, J., “Curvature Based Feature Detection for Hierarchical Grid Refinement in TCAD Topography Simulations”. In: Solid-State Electronics 191 (2022), p. 108258. doi: 10.1016/j.sse.2022.108258.

Book Contributions
  • [4] Lenz, C., Scharinger, A., Manstetten, P., Hössinger, A., Weinbub, J., “A Novel Surface Mesh Simplification Method for Flux-Dependent Topography Simulations of Semiconductor Fabrication Processes”. In: Scientific Computing in Electrical Engineering. Ed. by M. van Beurden, N. Budko, and W. Schilders. Springer, 2021, pp. 73–81. doi: 10.1007/978-3-030-84238-3_8.

  • [5] Lenz, C., Toifl, A., Hössinger, A., Weinbub, J., “Curvature Based Feature Detection for Hierarchical Grid Refinement in TCAD Topography Simulations”. In: Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS). Ed. by B. Cretu. IEEE, 2021, pp. 1–4. doi: 10.1109/EuroSOI-ULIS53016.2021.9560690.

Conference Contributions
  • [6] Lenz, C., Manstetten, P., Hössinger, A., Weinbub, J., “Automatic Grid Refinement for Thin Material Layer Etching in Process TCAD Simulations”. In: Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). 2022, pp. 11–12.

  • [7] Lenz, C., Toifl, A., Hössinger, A., Weinbub, J., “Curvature-Based Feature Detection for Hierarchical Grid Refinement in Epitaxial Growth Simulations”. In: Proceedings of the Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS). 2021, pp. 109–110.

  • [8] Lenz, C., Scharinger, A., Quell, M., Manstetten, P., Hössinger, A., Weinbub, J., “Evaluating Parallel Feature Detection Methods for Implicit Surfaces”. In: Proceedings of the Austrian-Slovenian HPC Meeting (ASHPC). 2021, p. 31. doi: 10.3359/2021hpc.

  • [9] Lenz, C., Scharinger, A., Hössinger, A., Weinbub, J., “A Novel Surface Mesh Coarsening Method for Flux-Dependent Topography Simulations of Semiconductor Fabrication Processes”. In: Proceedings of the International Conferences on Scientific Computing in Electrical Engineering (SCEE). 2020, pp. 99–100.

Curriculum Vitae

Personal Information
Name Christoph Lenz
Date of Birth September 16, 1988, Wien
Nationality Austrian
Place of Birth Vienna, Austria
Education
06/2019 - present

Doctoral Program, Electrical Engineering,
Institute for Microelectronics,
TU Wien

04/2016 - 04/2019

Graduate Studies (MSc), Technical Mathematics, Discrete Mathematics,
TU Wien,

10/2009 - 11/2017

Graduate Studies (BSc), Technical Mathematics,
TU Wien,

09/2003 - 06/2008

Matura, Majors: Accounting and Data Processing
HTL Donaustadt, Wien

Employment
06/2019 - 04/2023

Project Assistant, Christian Doppler Laboratory for High Performance TCAD,
Institute for Microelectronics, TU Wien

09/2016 - 05/2019

Software Tester, Usoft GmbH, Wien

05/2013 - 06/2015

Salesman, McSHARK, Wien

02/2012 - 05/2013

Freelance Programmer, Tchibo Coffee Service (Austria) GmbH, Wien

03/2010 - 05/2013

Salesman, MediaMarkt Österreich, Wien