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Subsections
One concise set of model parameters is used in all simulations. The extrinsic
parasitics, e.g. the emitter interconnect resistance, are accounted for in the
simulation by adding lumped resistances of 1 to all electric contacts.
In Fig. 4.15 the simulated forward Gummel plot for Dev. 1 at 293 K is
shown and compared to experimental data. Note the good agreement at moderate
and high voltages, typical for operation of this kind of devices. The measured
leakage currents at V
1 V cannot be reproduced by
simulation, despite of the fact that several generation/recombination
mechanisms, such as SRH recombination, surface recombination, and BB are taken
into account.
Figure 4.15:
Forward Gummel plots at V
= 0 V for Dev. 1:
Comparison with measurement data at 296 K
|
Figure 4.16:
Forward Gummel plots at V
= 0 V for Dev. 2:
Comparison with measurement data at 296 K and 376 K
|
Figure 4.17:
Forward Gummel plots at V
= 0 V for
Dev. 4: Comparison with measurement data
|
Figure 4.18:
Reverse Gummel plots at V
= 0 V for
Dev. 4: Comparison with measurement data at 293 K and 373 K
|
In order to account for self-heating effects the lattice heat flow equation
(3.14) is solved self-consistently with the energy
transport equations (3.6) and (3.7), which
results in a system of six partial differential equations. An additional,
substrate thermal contact is introduced. The thermal heat flow density is
calculated by (3.28) using a thermal contact resistance
with a measured value of about 400 K/W [27,199]. The
thermal dissipation through the emitter and base contacts is neglected,
therefore a Neumann boundary condition is assumed.
4.2.2.3 Simulation of Output Characteristics
It is a severe problem to achieve realistic results in simulation of output HBT
characteristics. This is especially true for power devices which are considered
in this work. As stated in [71] the power dissipation increases with
collector-to-emitter voltage V
, gradually elevating the junction
temperature above the ambient temperature. This leads to gradually decreasing
collector currents I at constant applied base current I or,
respectively, gradually increasing I at constant base-to-emitter
voltage V
. The simulated output device characteristics compared to
measurements for constant V
= 1.4 V to 1.45 V using a 0.01 V step
are shown in Fig. 4.19. A good agreement is achieved by simulation
including self-heating effects. In Fig. 4.20 the intrinsic temperature
in the device depending on the V
is presented. For Dev. 3 the
temperature reaches as much as 400 K for the specified thermal resistance. As
already stated in [63] such lattice temperatures significantly change
the material properties of the device and, consequently, its electrical
characteristics. This confirms the necessity of exact DC-simulations at several
high ambient temperatures before including self-heating effects.
Hydrodynamic simulation is needed to account for non-local effects. For
example, the electron temperature (see Fig. 4.21) is used as an input to
the hydrodynamic mobility model and therefore allows to simulate the electron
velocity overshoot in the collector space charge region. The carrier
temperature also influences the current flux across the heterointerfaces - the
higher it is the more carriers are able to surmount the energy barrier. This
effect is referred to as real-space transfer [70]. Considering the
nature of the simulated devices (including graded and abrupt heterojunctions)
and the high electron temperatures observed at maximum bias (above 2500 K - see
Fig. 4.21) a thermionic-field emission interface model (3.48)
is used in conjunction with the hydrodynamic transport model.
The resulting lattice temperature distribution in the device at V =
6.0 V and V = 1.45 V is shown in Fig. 4.22. The heat generated at
the heterojunctions flows out of the device in the direction of the substrate
heat sink. In the opposite direction the heat cannot leave the device and
therefore the emitter finger is heated up significantly up to 400 K. The
simulation shown is of practical interest and demonstrates the necessity of a
thermal shunt at the emitter contact rather than reducing the substrate
thickness.
Figure 4.19:
Output characteristics for Dev. 3: Simulation with
and without self-heating compared to measurement data
|
Figure 4.20:
Intrinsic device temperature vs. V
for Dev. 3
|
Figure 4.21:
Electron temperature distribution [K] at
V = V = 1.6 V
|
Figure 4.22:
Lattice temperature distribution [K] at V = 6.0 V
and V = 1.45 V: A substrate thermal contact with
=400 K/W
is added.
|
Next: 4.3 S-Parameter Simulation
Up: 4.2 High Power GaAs
Previous: 4.2.1 Fabrication of the
Vassil Palankovski
2001-02-28