4 Discrete Steps in Large-Area Devices

It is widely accepted that discrete steps in the traces, which are caused by individual oxide defects, can be experimentally resolved only in nano-scale devices (this is also discussed in Subsection 2.1.3 and shown in Figure 2.7). However, during the measurements conducted in this thesis discrete steps in the traces were also measured in large-area devices. An example is shown in Figure 4.1. In this figure an RTN signal measured on a large-area device with   10 µm and   120 nm is illustrated.

During the first observations of discrete steps in large-area devices, they were misinterpreted as contact issues. Especially in measurements directly on chip, a temporary failing contact between the needles and the pads have a similar impact on traces as the discrete steps associated with charge carrier exchange events caused by oxide defects. However, such steps were observed in a significant number of large-area pMOSFETs and their characteristic capture and emission times showed a bias and a temperature dependence. In particular, 40 % of the large-area MOSFETs showed step heights of   0.15 mV, 30 % showed step heights of   0.5 mV and 10 % showed step heights of   1 mV. Since no studies on discrete steps in traces in large-area devices have been reported in the literature up to now.

4.1 Probability to Measure Discrete Steps

The step heights of discrete steps in the traces caused by individual defects in nano-scale MOSFETs are exponentially distributed, as shown in Subsection 2.1.3. Since this empirically found distribution has been formulated based on the measurements of numerous devices and hundreds of defects, it is assumed that the influence of device-to-device variation on the number of oxide defects and random dopants are considered. From the CCDF in Equation 2.2 the probability that a step height with a value greater than a certain occurs in a device with a certain and can be calculated.

First the probability to measure a step in traces with   0.15 mV (smallest observed in the large-area devices) in nano-scale devices with   160 nm and   120 nm is calculated. For this purpose, pMOSFETs of a 130 nm commercial technology with   2.2 nm were considered. With   F and the mean value of the exponential step height distribution for nano-scale devices with the dimensions mentioned in this paragraph,  V (Equation 2.3), the probability is

.

By contrast, the probability to find a step with   0.15 mV in the traces of large-area devices with   10 µm,   120 nm as it was observed it is orders of magnitude smaller. With   F, the mean value of the exponential step height distribution for large-area devices with the dimensions mentioned in this paragraph,  V, according to Equation 2.3 the probability is

.

These results show that it is quite likely to observe discrete steps in the traces of nano-scale devices but it should be highly unlikely to observe them in the signal of large-area devices. However, in 40 % of the large-area MOSFETs step heights with   0.15 mV were measured which is orders of magnitude more than the calculated probability.

In the introduction of this chapter, it is mentioned that the characteristic capture and emission times of the discrete steps in the traces of large-area devices showed a bias and a temperature dependence. In this context, the experimental characterization of these dependencies is presented in the next section.