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4.3 Conclusions

About 40 % of the large-area MOSFETs showed step heights of $d$   $>$  0.15 mV in $\Delta V_{\mathrm {th}}$ measurements, 30 % showed step heights of $d$   $>$  0.5 mV and 10 % showed step heights of $d$   $>$  1 mV. Due to the challenging experimental characterization of steps close to the resolution limit of the experimental setup, the bias dependence and the temperature dependence of only one RTN signal could be characterized. It was observed that with increasing $|$ $V_\mathrm {G}$ $|$ , $\tau _{\mathrm {c}}$ decreases and $\tau _{\mathrm {e}}$ increases and both decrease with increasing temperature. Such a behavior of the characteristic capture and emission times is comparable to the behavior of the characteristic times of single defects. However, due to a too small data set it could not be proved if $\tau _{\mathrm {c}}$ $($ $V_\mathrm {G}$ $)$ and $\tau _{\mathrm {e}}$ $($ $V_\mathrm {G}$ $)$ can be modeled with a four-state NMP model. Finally, a few thoughts on possible causes for such steps in $\Delta V_{\mathrm {th}}$ traces in large-area devices were summarized. For example, not a single defect but a cluster of coupled defects might cause such steps. However, further analysis is required on this topic in order to give a proper explanation for possible causes.

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Previous: 4.2 Experimental Characterization Top: 4 Discrete Steps in Large-Area Devices Next: 5 Impact of Mixed NBTI/HC Stress on MOSFET Characteristics