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6.4 NBTI at low temperatures

This section represents an extension of Section 3.4 where we have analyzed NBTI dynamics of arbitrarily stressed devices at different temperatures. By using the in-situ polyheater technique, the so far strict constraint that the stress temperature has to equal the recovery temperature could be removed, revealing new insights in the temperature and the bias dependence of the power-law exponent, the recovery rates and on the ratio between interface and oxide trapped charge. In particular, the power-law exponent for interface state generation is found to be independent of the stress temperature and the stress bias, challenging previous investigations performed either at different characterization temperatures or being afflicted with large time delays for cooling from stress temperature to a unique characterization temperature [8, 78]. After erasing the recoverable contribution by gate pulsing toward accumulation, a universal factor of 2.5 between the interface state dependent (math image) shift component and the quasi-permanent part of the total shift is obtained for all analyzed stress temperatures, fields and times. The appearance of this universality helps to extend the model of recoverable $\mathrm {E}’$ centers to quasi-permanent components represented by interface states and locked-in oxide charges, cf. Section 4.3 [178].

6.4.1 Experimental constraints associated with conventional MSM techniques

From an experimental point of view, it is quite challenging to compare degradation and recovery dynamics of devices stressed at arbitrary fields and temperatures. When applying for example the standard MSM technique (cf. Section 3.1), the stress phase has to be interrupted repeatedly in order to record CP currents by gate pulsing or (math image) shifts around the threshold voltage of the device. In particular, to monitor the total shift, it is necessary to switch the gate bias from its stress level to a much lower recovery level around the threshold voltage of the device and record in parallel the linear or the saturation drain current. Alternatively, in order to measure the degraded maximum CP current right after stress, one must switch from a constant stress bias to gate pulsing between accumulation and inversion, thereby measuring the maximum charge pumping current at the substrate junction of the device. Since the switch from constant gate bias stress to alternating gate pulsing is experimentally harder to perform in a minimum of time, the CP data are typically afflicted with larger time delays compared to (math image) shift data. During the unavoidable time delay involved with the change of the biasing conditions and the initialization of the subsequent recovery measurement, an unknown amount of recovery may already have occured when measuring the first point after the termination of stress. Consequently, the evaluation of the actual amount of degradation at the end of stress becomes distorted.

It has been shown in Section 6.2 that the temperature plays a significant role in defect recovery and relaxation. In a first-order approximation a temperature activated recovery process may be expressed by an Arrhenius law, cf. Eq. 6.1.

However, when aspiring to determine the true degradation level at the very beginning of the recovery phase, the exact value of $\tau _\mathrm {0}$ has to be investigated. This is very difficult since $\tau _\mathrm {0}$ is supposed to be very small and may be linked to the inverse phonon frequency which is around $10^\mathrm {13}\,\mathrm {Hz}$ . To approach $\tau _\mathrm {0}$ , sophisticated MSM methods have been developed in the past that accomplish (math image) measurements only a couple of micro seconds after removal of the stress bias [170, 58, 59] thereby attaching considerable importance on the transition event between the stress and the relaxation phase [27, 52, 54]. However, following Eq. 6.1 and Section 6.2, a comparison of threshold voltage shifts and CP currents recorded at different temperatures may be misleading due to the temperature dependence of NBTI recovery. To put it in a nutshell, the limitation that the stress temperature has to equal the recovery temperature distorts a reliable case study on NBTI dynamics for different stress temperatures. Furthermore, particular theoretical difficulties with the temperature arise when attempting to correlate the (math image) shift to the generation of interface states. This is mainly due to the fact that the charge pumping technique, traditionally used to characterize interface states [37], is quite inefficient at stress temperature since it covers just a very narrow part of the silicon bandgap when performed at high device temperatures, cf. Subsection 2.2.1. Consequently, when aspiring to estimate the threshold voltage shift caused by charged interface states ( (math image) ) it is necessary to assume a flat DOS in order to account for the energetic mismatch, cf. Subsection 2.2.2. However, the flat density approach is definitely a very crude approximation [49, 86, 179] which is likely to introduce a considerable error when comparing data measured at different stress/recovery temperatures. Similar difficulties arise when comparing (math image) shifts measured at different characterization temperatures. Due to the fact that the intrinsic carrier concentration within a semiconductor is exponentially temperature dependent, the Fermi level position at a particular read-out bias becomes a function of the temperature as well leading to different carrier concentrations at the interface for different characterization temperatures. Thus, in order to overcome those theoretical and experimental discrepancies, it is highly expedient to compare devices stressed at different stress temperatures directly post stress at always the same recovery temperature. Ideally, the recovery temperature should be much lower than the stress temperature in order to achieve a reasonable CP resolution and in order to decelerate thermally activated recovery processes. According to Eq. 6.1 the recovery time constants decrease exponentially with temperature which can be interpreted as a stretching on the time axis. The polyheater technique allows to generate different stress temperatures by applying different heater powers. On the other hand, the recovery temperature can be chosen independently and at a much lower level, i.e. -60 °C. When applying degradation quenching, one might see a larger degradation level 10 $\,\mathrm {ms}$ post stress at -60 °C than for example 1 $\,\mathrm {\mu s}$ post stress at the stress temperature. This feature is a particular strength of the polyheater measurement technique since it allows us to see more of the actual degradation level at the end of stress even though it might take a couple of milliseconds to measure the first current after removal of the stress bias.

6.4.2 Experimental setup for low temperature characterization

Figure 6.20: (a) The MSM procedure used to monitor the degradation and recovery dynamics of the CP current and the $V_\mathrm {TH}$ shift after stressing the device at various gate bias ( $V_\mathrm {GS}$ ) and temperature ( $T_\mathrm {S}$ ) conditions. During stress, the polyheater provides the stress temperature $T_\mathrm {S}$ . During recovery, the heater is switched off and the device approaches the constant recovery temperature of -60 °C. Different devices are used for each stress temperature and stress bias. The MSM procedure is performed with increasing stress ( $t_\mathrm {S}$ ) and recovery ( $t_\mathrm {R}$ ) durations (1/10/100/1,000 $\,\mathrm {s}$ ). The charge pumping cycles $t_\mathrm {CP}$ and the recovery phase $t_\mathrm {R’}$ last for 0.5 $\,\mathrm {s}$ independently of $t_\mathrm {S}$ and $t_\mathrm {R}$ . (b) illustrates a representative example of the $\Delta V_\mathrm {TH}$ shifts recorded after stress ( $\Delta V_\mathrm {TH}^\mathrm {tot}$ during $t_\mathrm {R}$ ) and after CP ( $\Delta V_\mathrm {TH}^\mathrm {perm}$ during $t_\mathrm {R’}$ ). As a consequence of gate pulsing be- tween inversion and accumulation the $\Delta V_\mathrm {TH}$ shift measured after CP is con- siderably reduced and quasi-permanent.

Fig. 6.20 (a) illustrates the basic MSM procedure applied to PMOS devices (SM6P/30/STD2). During stress, various electric fields (5.6/5.0/4.3 $\,\mathrm {MV/cm}$ ) and temperatures (125/100/75 °C) are applied to nine different devices. During recovery, the device temperature is always -60 °C and the drain current is recorded at the threshold voltage (-1.1 $\,\mathrm {V}$ ). During stress, the polyheater provides the individual stress temperature ( (math image) ) and a certain stress bias () is applied to the gate junction. The recovery cycle at -60 °C is split in three sections. During section (I), the threshold voltage recovery ( $\Delta V_\mathrm {TH}^\mathrm {tot}$ ) is monitored immediately after terminating the stress, the recovery time ( (math image) ) equaling the previous stress time (). During section (II), a 0.5 $\,\mathrm {s}$ lasting CP measurement is appended to the previous recovery cycle performed at ( $t_\mathrm {CP}$ ). Since CP implies gate bias switches between inversion and accumulation, thereby bringing the stress induced oxide defects ( $\mathrm {E}’$ centers) repeatedly to the neutral charge state which is prone to structural relaxation (cf. Subsection 6.3.3), the (math image) shifts recorded after the CP cycle for 0.5 $\,\mathrm {s}$ during $t_\mathrm {R’}$ in section (III) are expected to be influenced considerably. The same MSM procedure is performed on each device with increasing stress ( $t_\mathrm {S}$ ) and recovery ( $t_\mathrm {R}$ ) durations (1/10/100/1,000 $\,\mathrm {s}$ ). The stress temperature ( (math image) ) and the stress field () is varied.

Fig. 6.20 (b) illustrates a representative example of $\Delta V_\mathrm {TH}$ shifts recorded during the sections (I) and (III) of the the MSM experiment. Right after the stress runs ‘regular’ log-like recovery traces are obtained for $\Delta V_\mathrm {TH}^\mathrm {tot}$ during (math image) . As a consequence of CP, the measured degradation level is reduced considerably in section (III), the $\Delta V_\mathrm {TH}$ shift being constant during $t_\mathrm {R’}$ ( $\Delta V_\mathrm {TH}^\mathrm {perm}$ ).

6.4.3 Discussion on the stress dependent recovery rate

In Section 3.4 it was found that after 6,000 $\,\mathrm {s}$ seconds of stress the recovery rate is nearly independent of the stress temperature but depends considerably on the stress field. This former study was, however, limited to the constraint that the stress temperature has to equal the recovery temperature. By means of the new experimental setup and the availability of the polyheater technique, the study is now extended to different stress times where the recovery rate and the degradation level at the end of stress is monitored always at the same analyzing temperature of -60 °C.

Figure 6.21: The $V_\mathrm {TH}$ recovery curves measured during $t_\mathrm {R}$ after different stress times. Nine separate devices were stressed for 1/10/100/1,000 $\,\mathrm {s}$ at three different stress temperatures (125/100/75 °C) and three different stress fields (5.6/5.0/4.3 $\,\mathrm {MV/cm}$ ). The various stress fields are de- picted from left to right, while different stress temperatures are illustrated in (a) (125 °C), (b) (100 °C) and (c) (75 °C). The unscaled $V_\mathrm {TH}$ recovery data are depicted on the left hand side. On the right hand side different stress fields recorded at the same stress temperature were scaled by multiplying the data by appropriate scaling factors. Perfect scalability can be obtained for every stress temperature. Note that the field scaling factors of different stress temperatures are very similar. The $V_\mathrm {TH}$ shifts recorded at the same stress field but at different stress times or temperatures differ rather by an additive than by a multiplicative factor.

The results of the (math image) shifts recorded during after different stress times are illustrated in Fig. 6.21. For illustration purposes, different stress biases and stress temperatures were grouped in nine separate graphs on the left hand side of Fig. 6.21. There are four separate measurement curves in every graph corresponding to four subsequent stress runs on every device with 1/10/100/1,000 $\,\mathrm {s}$ stress and recovery durations, respectively. Obviously, the total (math image) shift increases with stress time, stress bias and stress temperature. Note that as opposed to Section 3.4 the results illustrated in Fig. 6.21 have been recorded at exactly the same recovery conditions directly post stress ( = -60 °C; = -1.1 $\,\mathrm {V}$ ) although the devices have been stressed at arbitrary temperatures and electric fields.

All recovery traces show a perfect linear decrease on the semi-logarithmic time plot. Basically, two features define the shape of the recovery plot: (i) the slope ( $B_\mathrm {R}$ in mV/decade) and (ii) the offset at an arbitrary time ( $A_\mathrm {S}$ in mV). Considering that every recoverable trap has a particular time constant that equals a point in time at which the probability of relaxation is largest, it is reasonable to suggest that a steeper recovery slope indicates a larger number of recoverable traps having similar time constants, whereas a larger offset with respect to the y-axis ( (math image) axis) indicates an enhanced creation of quasi-permanent defects, or defects having at least larger recovery time constants than observed in this particular recovery experiment. In the following, all defect types which remain apparently constant within the time scale of our experiment will be denoted as ‘quasi-permanent’ defects.

Note that only the stress field influences the recovery slope considerably whereas stress time and temperature rather shift the recovery traces by an additive factor, indicating the activation of defects having larger recovery time constants. To highlight this observation in more detail, the calculated recovery slopes for all stress biases and stress temperatures have been depicted as a function of the stress time in Fig. 6.22.

Figure 6.22: The extracted recovery rates $B_\mathrm {R}$ (slopes of the recovery curves) per decade for different stress biases and stress temperatures. Since the recovery characteristics of all curves illustrated in Fig. 6.21 are approximately linear in a loga- rithmic time scale, an average recovery rate per decade has been evaluated for every tested device (stress condition). Different stress temperatures are illustrated in (a) (125 °C), (b) (100 °C) and (c) (75 °C). The stress field has the most considerable influence on the recovery rate and therefore probably also on the total amount of recoverable traps created under NBTI. It seems that increasing stress time or stress temperature rather creates quasi-permanent defects or at least defects with much larger recovery time constants.

$ B_\mathrm {R} $ — Figure 6.22: The extracted recovery rates $B_\mathrm {R}$ (slopes of the recovery curves) per decade for different stress biases and stress temperatures. Since the recovery characteristics of all curves illustrated in Fig. 6.21 are approximately linear in a loga- rithmic time scale, an average recovery rate per decade has been evaluated for every tested device (stress condition). Different stress temperatures are illustrated in (a) (125 °C), (b) (100 °C) and (c) (75 °C). The stress field has the most considerable influence on the recovery rate and therefore probably also on the total amount of recoverable traps created under NBTI. It seems that increasing stress time or stress temperature rather creates quasi-permanent defects or at least defects with much larger recovery time constants.

According to the discussion above, one may conclude that increased stress fields activate a larger number of both recoverable ( $\mathrm {E}’$ centers) and quasi-permanent defects (interface traps and fixed positive oxide charge). This is reflected by the steeper recovery slope at higher stress fields, indicating a larger amount of defects having similar emission time constants, and the increased offsets, corresponding to more permanent or quasi-permanent damage. On the other hand, stress time and temperature seem to enhance predominantly the creation of defects with larger time constants while keeping the total number of recoverable defects which have time constants smaller than (math image) almost unaffected. In particular, one can find a set of empirical scaling factors that make the recovery traces overlap for different stress fields and the same stress temperature, cf. Fig. 6.21. Remarkably, the scaling factors are almost identical for all stress times and stress temperatures indicating a strong coupling of recoverable and quasi-permanent damage. It has to be remarked that one may find similar bias scaling factors when recording stress and recovery classically at the same temperature, as it was done in Section 3.4 and by others [144, 77], however, the particular factors for different stress temperatures are only identical when comparing recovery traces recorded at one single recovery temperature. The scaled recovery curves for different stress fields are illustrated on the right hand side of Fig. 6.21.

Interface state re-passivation does not play a significant role in the observed (math image) recovery. This was checked in [178] by comparing the maximum CP currents right after stress to the maximum CP currents recorded during $t_\mathrm {CP}$ after constant bias recovery. Upon those measurements and due to all results discussed in the previous chapters, the interface state contribution is in the following argumentation considered as quasi-permanent as long as the gate bias is constant and as long as one abstains from long continuous gate pulsing periods, cf. Section 5.2.

6.4.4 Correlation between interface states and $V_\mathrm {TH}$ shift

Having measured time, bias and temperature dependent (math image) shifts and CP current degradation at identical recovery conditions, one main aim of this study is to check whether there is a correlation between the interface state generation and the total shift. To accomplish this, it is necessary to convert the increase of the maximum CP current () into an interface state dependent threshold voltage shift ( (math image) ). Similar attempts have been already made by others, however, previous studies were always bound to the constraint that the analyzing temperature equals the stress temperature, the implications of which being quite significant, as shown in the following.

The conversion is performed according to Subsection 2.2.2. The position of the Fermi level at a gate bias of $V_\mathrm {GR}$ = - $1.1\,\mathrm {V}$ and at a temperature of -60 °C was simulated numerically [29] to be about 120 $\,\mathrm {meV}$ above the silicon valence band edge. Using our particular pulse setup ( $f$ = $500\,\mathrm {kHz}$ ; $t_\mathrm {r}$ = $t_\mathrm {f}$ = $300\,\mathrm {ns}$ ; $V_\mathrm {GH}$ = - $2.0\,\mathrm {V}$ ; $V_\mathrm {GB}$ = + $2.0\,\mathrm {V}$ ) and under the assumption of an energetically homogeneous capture cross section of $\sigma _\mathrm {p}$ = $10^\mathrm {-15}\,\mathrm {cm^{2}}$ [42, 46], the lower emission boundary of (math image) at -60 °C was calculated to be approximately 150 $\,\mathrm {meV}$ above the silicon valence band edge. We consider this to be almost equivalent to the 120 $\,\mathrm {meV}$ calculated before for at -1.1 $\,\mathrm {V}$ . Note that at -60 °C the energy interval covers nearly the entire silicon bandgap due to the low characterization temperature. This would not be the case when recording the CP current at the much higher stress temperature of i.e. 125 °C where (math image) would be centered narrowly around midgap [50], cf. Fig. 2.8 in Subsection 2.2.1. Since a symmetrical pulse setup was used, it is necessary to consider that the CP signal covers approximately the same energy range in the upper and lower half of the silicon bandgap. Thus, in order to make the two energy intervals (math image) and coincide, one must divide the CP signal by a factor 2 and assume that the shape of the density of state (DOS) profile is symmetrical around midgap yielding a weight factor of approximately 1/2, cf. Eq. 2.41. Except for this established assumption (symmetric DOS), no additional approximation on the shape of the density of state profile is necessary in order to accomplish the conversion from (math image) to . The ability to accomplish the conversion without any additional assumption on the DOS is a particular benefit of our low temperature polyheater measurement technique.

Following Eq. 2.38 in Subsection 2.2.2, the increase of the maximum CP current ( (math image) ) may be converted into an interface state dependent threshold voltage shift ():

$(6.5) \{begin}{align} \label {e:dvth-it-low-T} \Delta V_\mathrm {TH}^\mathrm {it} = \frac {\Delta I_\mathrm {CP}^\mathrm {max}}{2 A_\mathrm {G}^\mathrm {eff} f C_\mathrm {OX}}, \{end}{align}$

where the factor 2 considers that only donor-like interface traps (in the lower half of the silicon bandgap) contribute to a negative threshold voltage shift at $V_\mathrm {GR}$ = - $1.1\,\mathrm {V}$ . Once being able to isolate the interface state dependent (math image) shift component from the total , one may attempt to find correlations between the threshold voltage shift measured from the drain current degradation and the number of generated P $_\mathrm {b}$ centers measured from the increase in the CP current. Such correlations are investigated in this subsection.

Figure 6.23: Time dependent degradation dynamics of $\Delta V_\mathrm {TH}^\mathrm {tot}$ (large full sym- bols), $\Delta V_\mathrm {TH}^\mathrm {perm}$ (small full sym- bols) and $\Delta V_\mathrm {TH}^\mathrm {it}$ (open symbols) recorded for three different stress temperatures ((a) 125 °C; (b) 100 °C; (c) 75 °C) and three different stress fields (5.6/5.0/4.3 $\,\mathrm {MV/cm}$ ). All data was measured 10 $\,\mathrm {ms}$ after the termination of stress at -60 °C.

Fig. 6.23 illustrates the individual evolution of $\Delta V_\mathrm {TH}^\mathrm {tot}$ , $\Delta V_\mathrm {TH}^\mathrm {perm}$ and $\Delta V_\mathrm {TH}^\mathrm {it}$ for different stress temperatures and electric fields. As can be seen, all types of shifts show a power-law-like increase with the stress time (cf. Eq. 3.1), however, the steepness (power-law exponent $n$ ) and the offset (pre-factor $A_\mathrm {S}$ ) of the individual shifts differ considerably. Note that $\Delta V_\mathrm {TH}^\mathrm {perm}$ is much lower than $\Delta V_\mathrm {TH}^\mathrm {tot}$ , indicating recoverable oxide trap neutralization and annealing as a consequence of accumulation phases during CP consistent with the results obtained in Section 6.3.

Based on the model discussed in Section 6.3, it is reasonable to suggest that the total (math image) shift ( $\Delta V_\mathrm {TH}^\mathrm {tot}$ ) consists of quasi-permanent ( $\Delta V_\mathrm {TH}^\mathrm {perm}$ ) and recoverable ( $\Delta V_\mathrm {TH}^\mathrm {rec}$ ) components:

$(6.6) \{begin}{align} \label {e:dvth-tot} \Delta V_\mathrm {TH}^\mathrm {tot} = \Delta V_\mathrm {TH}^\mathrm {rec} + \Delta V_\mathrm {TH}^\mathrm {perm}. \{end}{align}$

After having annealed most recoverable traps during CP, the remaining quasi-permanent damage is assumed to be combination of interface state charge (P $_\mathrm {b}$ centers) and locked-in positive oxide defects [144]:

$(6.7) \{begin}{align} \label {e:dvth-perm} \Delta V_\mathrm {TH}^\mathrm {perm} = \Delta V_\mathrm {TH}^\mathrm {it} + \Delta V_\mathrm {TH}^\mathrm {ox}. \{end}{align}$

Provided the generation of interface states and locked-in oxide defects is coupled somehow, one would expect a universal correlation between $\Delta V_\mathrm {TH}^\mathrm {it}$ and $\Delta V_\mathrm {TH}^\mathrm {perm}$ for all analyzed times, temperatures and stress fields. In particular, when assuming that P $_\mathrm {b}$ centers and locked-in oxide traps are created simultaneously, i.e. as a consequence of hydrogen exchange between passivated P $_\mathrm {b}$ centers (Si–H bonds) and $\mathrm {E}’$ centers, as discussed in Section 4.3 and in [144, 83], $\Delta V_\mathrm {TH}^\mathrm {it}$ and $\Delta V_\mathrm {TH}^\mathrm {ox}$ should appear in a 50:50 relation. Consequently, $\Delta V_\mathrm {TH}^\mathrm {it}$ would represent about half of the $\Delta V_\mathrm {TH}^\mathrm {perm}$ component which then consists of both components in equal parts.

Figure 6.24: (a) Pre-factors $A_\mathrm {S}$ and power-law exponents $n$ (b) as a function of the oxide field ( $E_\mathrm {OX}$ ) and the stress temperature ( $T_\mathrm {S}$ ). The data was extracted from Fig. 6.23. Different stress temperatures are illustrated as diamonds (125 °C), circles (100 °C) and (triangles 75 °C).

In Fig. 6.24, the individual pre-factors $A_\mathrm {S}$ and the power-law exponents $n$ are illustrated as a function of stress field and stress temperature. In Fig. 6.24 (a), $A_\mathrm {S}$ is found to increase with stress temperature and shows quadratic dependence on the oxide field, consistent with the results presented in Chapter 3. $A_\mathrm {S}^\mathrm {tot}$ is about 16 times larger than $A_\mathrm {S}^\mathrm {it}$ and 8 times larger than $A_\mathrm {S}^\mathrm {perm}$ , indicating a huge amount of recoverable damage ( $\mathrm {E}’$ centers) which becomes annealed during the intermediate CP cycle. The individual power-law exponents displayed in Fig. 6.24 (b) are found to be independent of the oxide field and the stress temperature. $n_\mathrm {S}^\mathrm {tot}$ is smaller than $n_\mathrm {S}^\mathrm {perm}$ and $n_\mathrm {S}^\mathrm {it}$ indicating that oxide trap creation has different degradation dynamics than quasi-permanent damage including interface states. Note that the pre-factors $A_\mathrm {S}^\mathrm {perm}$ and $A_\mathrm {S}^\mathrm {it}$ as well as the power-law exponents $n_\mathrm {S}^\mathrm {perm}$ and $n_\mathrm {S}^\mathrm {it}$ are very similar suggesting a tight coupling between the two components.

The tight coupling between $\Delta V_\mathrm {TH}^\mathrm {it}$ and $\Delta V_\mathrm {TH}^\mathrm {perm}$ is most explicitly demonstrated in Fig. 6.25. Fig. 6.25 is identical to Fig. 6.23 but the interface state component ( $\Delta V_\mathrm {TH}^\mathrm {it}$ ) was multiplied by a universal factor of 2.5. As a consequence, perfect agreement between $\Delta V_\mathrm {TH}^\mathrm {perm}$ and $\Delta V_\mathrm {TH}^\mathrm {it}$ is obtained for all stress fields, temperatures and times. A similar factor making $\Delta V_\mathrm {TH}^\mathrm {it}$ overlapping with $\Delta V_\mathrm {TH}^\mathrm {tot}$ cannot be obtained due to the fact that $\Delta V_\mathrm {TH}^\mathrm {tot}$ consists of two independent components which provide different field and temperature acceleration. Note that the extracted factor of 2.5 is close to the physically predicted 50:50 relation between quasi-permanent (math image) shift and interface state creation which would account for a factor of 2 according to Eq. 6.7. It has to be emphasized that a physical 50:50 ratio need not necessarily correspond to the relation of electrically active traps since the relation of created and charged defects also depends on the individual density of state profiles.

Figure 6.25: Similar illustration as Fig. 6.23, however, the interface state dependent $V_\mathrm {TH}$ shift component ( $\Delta V_\mathrm {TH}^\mathrm {it}$ ) was multiplied by a universal factor of 2.5 leading to a nearly perfect agreement of $\Delta V_\mathrm {TH}^\mathrm {it}$ (open symbols) and $\Delta V_\mathrm {TH}^\mathrm {perm}$ (small full sym- bols).

Alternatively to the coupling argument, it may be argued that $\Delta V_\mathrm {TH}^\mathrm {perm}$ is solely due to $\Delta V_\mathrm {TH}^\mathrm {it}$ , for example when assuming donor-like defects which cover the whole silicon bandgap [140]. However, this assumption is in contradiction to the Fermi Level dependence of the (math image) shift. In particular, it has been shown in Section 5.1 that interface states charge negatively in the NMOS device, where the Fermi level is pinned close to the conduction band edge during read-out, causing a net smaller or even positive threshold voltage shift after NBTS [10, 145].

6.4.5 Discussion on the power-law exponent

The power-law exponent is a crucial parameter for reliability life-time prediction since it is used to extrapolate the degradation dynamics (measured within a limited interval of time) to a long period of time corresponding to the product operation time. In this study is was found that the power-law exponent of the total (math image) shift ( $n_\mathrm {S}^\mathrm {tot}$ ) as well as the power-law exponents for interface state creation $n_\mathrm {S}^\mathrm {it}$ and quasi-permanent degradation is independent of the stress field and the stress temperature (cf. Fig. 6.24 (b)) provided the DUTs are characterized always at the same analyzing temperature. In Section 3.4 the power-law exponents $n_\mathrm {S}^\mathrm {tot}$ were evaluated for the case where the stress temperature ( (math image) ) equals the recovery temperature . Even then $n_\mathrm {S}^\mathrm {tot}$ was found to be independent of the stress temperature within a range between -60 °C and 200 °C. In this previous study the temperature dependency of $n_\mathrm {S}^\mathrm {it}$ was not investigated due to the temperature sensitivity of the CP signal which is expected to introduce an error.

While the independence of the power-law exponent on the electric field has been observed already by others, the independence of the stress temperature is in contradiction to previous studies [8, 76] who suggested a linear T-dependence of $n_\mathrm {S}^\mathrm {it}$ . This linear T-dependence is either derived from a dispersive reaction controlled hydrogen release model [8, 78] (cf. Section 4.2) or from a dispersive hydrogen diffusion model [76, 27]. Both models suggest the power-law exponent $n_\mathrm {S}^\mathrm {it}$ to increase linearly with the stress temperature. A comparison between our results and the results of Huard et al. [8, 78] is given in Fig. 6.26.

Figure 6.26: (a) Extracted power-law exponents for interface states creation ( $n_\mathrm {S}^\mathrm {it}$ ) measured with stress tem- perature equals recovery temperature (full squares) and with the same stress temperatures but at a constant recovery temperature of -60 °C (open diamonds) as a function of the stress temperature. When measuring $n_\mathrm {S}^\mathrm {it}$ conventionally (stress tem- perature equals recovery temperature) the extracted power-law exponents for interface states creation are much larger and increase slightly with the stress temperature (slope 2.55). On the other hand, when measuring $n_\mathrm {S}^\mathrm {it}$ at a constant recovery tem- perature of -60 °C, the extracted power-law exponents are smaller and stable with temperature. (b) Temperature dependence of $n_\mathrm {S}^\mathrm {it}$ measured on p-channel MOS- FETs with a 2 $\,\mathrm {nm}$ thick nitrided gate oxide (data from [8]). The power-law exponent in- creases significantly with stress temperature (slope 9.11).

For stress temperatures between 75 °C and 125 °C the values of $n_\mathrm {S}^\mathrm {it}$ in literature are reported to be in the range of 0.25 to 0.35 (cf. Fig. 6.26 (b)) which is much larger than the values 0.18 to 0.22 measured by our technique (cf. open diamonds in Fig. 6.26 (a)). We suggest that the discrepancies between our investigations and previous attempts arise from the fact that we analyze the CP current increase (recorded 10 $\,\mathrm {ms}$ post stress) at always the same recovery temperature (-60 °C) while others compare either CP currents measured at different temperatures, thereby profiling different ranges of the silicon bandgap, or accept a long time delay at undefined biasing conditions between stress and measurement for cooling. In order to check this hypothesis, a similar experiment was performed using a stress field of 5.6 $\,\mathrm {MV/cm}$ , but this time the stress temperature equaling the recovery temperature (cf. full squares in Fig. 6.26 (a)). Remarkably, by the conventional approach, completely different power-law exponents for $n_\mathrm {S}^\mathrm {it}$ are obtained, which increase slightly with temperature in a similar but not that distinct way as reported in literature [8, 76]. The result suggests that the larger values of the power-law exponents $n_\mathrm {S}^\mathrm {it}$ and their temperature development, as measured by conventional techniques, might be originated in the different energy ranges ( (math image) ) profiled and probably also in enhanced interface state recovery when recording the CP currents at an undefined time post stress at the particular stress temperatures.

6.4.6 Extension of the microscopic model explaining NBTI induced defects

In this section the (math image) degradation and recovery of different PMOS devices (SM6P/30/STD2) stressed at different electric fields and temperatures were investigated. By making use of the polyheater technique, it became feasible to subject devices to different stress temperatures while characterizing them at a much lower characterization temperature of -60 °C. This procedure allows to evaluate degradation and recovery phenomena of differently stressed devices under identical recovery conditions. Such investigations reveal that the power-law dynamics of interface state generation ( $n_\mathrm {S}^\mathrm {it}$ ) and (math image) shifts ( $n_\mathrm {S}^\mathrm {tot}$ ) are considerably different when characterizing arbitrarily stressed devices at identical low temperature recovery conditions (i.e. $n_\mathrm {S}^\mathrm {it}$ turns out to be independent of the stress temperature in contradiction to previous studies where the stress temperature equaled the recovery temperature). A particularly adapted MSM setup made it possible to convert the increase of the maximum CP current ( (math image) ) recorded under identical recovery conditions directly (10 $\,\mathrm {ms}$ ) after stress into an interface state dependent shift (). By comparing the separate shifts extracted from and measurements, we conclude that a direct correlation between $\Delta V_\mathrm {TH}^\mathrm {tot}$ and (math image) cannot be obtained as long as the total shift contains recoverable components, i.e. recoverable oxide defects like $\mathrm {E}’$ centers. Gate pulsing between inversion and accumulation (i.e. in the form of CP) turned out to anneal this recoverable component very efficiently. Finally, the quasi-permanent part of the (math image) shift, determined from after CP, was found to be directly proportional to the interface state dependent threshold voltage shift. Universal correlation (factor 2.5) between $\Delta V_\mathrm {TH}^\mathrm {perm}$ and $\Delta V_\mathrm {TH}^\mathrm {it}$ has been demonstrated for various stress biases, temperatures and times. The results are strong evidence for a very tight coupling between interface state generation and the quasi-permanent part of (math image) degradation measured under DC bias conditions. Based on these findings the microscopic model discussed in Subsection 6.3.1 may be extended to quasi-permanent defects, hydrogen and interface states. This was done by Grasser et al. in [144], where we have proposed the following complete model including recoverable and quasi-permanent damage, cf. Fig. 6.27.

Figure 6.27: A schematic illustration of the microscopic transitions predicted by the Grasser model [144]. During stress, recoverable oxide traps ( $\mathrm {E}’$ centers) are created by temperature and field induced bond breakage of intrinsic oxygen vacancies. In the positive charge state the $\mathrm {E}’$ center may become neutralized and anneals permanently (Path A). Alter- natively it may get locked-in by hydrogen capture form the interface (Path B) thereby creating quasi-permanent damage.

$ \mathrm {E}’ $ — Figure 6.27: A schematic illustration of the microscopic transitions predicted by the Grasser model [144]. During stress, recoverable oxide traps ( $\mathrm {E}’$ centers) are created by temperature and field induced bond breakage of intrinsic oxygen vacancies. In the positive charge state the $\mathrm {E}’$ center may become neutralized and anneals permanently (Path A). Alter- natively it may get locked-in by hydrogen capture form the interface (Path B) thereby creating quasi-permanent damage.

Following Fig. 6.27: Path A: During NBTS, oxygen vacancies located close to the interface are assumed to break up and become positively charged (transition I) due to the presence of the high electric field and a majority of holes at the gate oxide substrate interface ( $\mathrm {E}’$ centers). During recovery, where the field and the carrier situation at the interface is quite different, some of these $\mathrm {E}’$ centers ( (math image) ) may become neutralized by hole emission (transition II). Once in the neutral charge state, the $\mathrm {E}’$ center can anneal permanently via structural relaxation, thereby restoring the initial precursor state again (transition III). Structural relaxation is assumed to be highly temperature activated (relaxation barrier), while neutralization is supposed to be very fast and mainly Fermi level driven. In particular, when the temperature is very low (i.e. -60 °C) some neutralized traps (which did not manage transition III) may become positively charged again during a subsequent sweep toward inversion (hashed arrow), cf. Fig. 6.15 (a). Path B: Once created during stress, the dangling bond of the $\mathrm {E}’$ center can optionally attract a hydrogen atom from the interface which converts the recoverable oxide defect ( (math image) ) and the passivated interface state (Si–H bonds) into a locked-in positive oxide defect () and an electrically active P $_\mathrm {b}$ center () (transition IV). In principle, the reverse reaction of Path B, where the H atom is released from the dangling bond of the $\mathrm {E}’$ center and travels back to the un-passivated interface state, is feasible as well (hashed arrow). However, in a first order approximation, this back transition is neglected assuming that the Si–H bond is stable within the $\mathrm {E}’$ center. Consequently, once created, locked-in oxide defects and interface states are considered as quasi-permanent charge centers which cannot relax but may exchange carriers with the silicon substrate.

In principle, the model implies the following fundamental statements:

1. The total degradation consists of the following components: (1) Quasi-permanent interface states and locked-in oxide charges which emerge in a 50:50 relation due to entropy driven hydrogen exchange between Si–H bonds at the interface and positively charged $\mathrm {E}’$ centers; (2) Recoverable positively charged $\mathrm {E}’$ centers which may be annealed by time, temperature and Fermi level level switches toward accumulation.
2. The appearance of quasi-permanent damage depends highly on the number of Si–H precursors at the interface (passivation degree).
3. Recoverable damage is largely independent of hydrogen (at least, when neglecting the loss of recoverable $\mathrm {E}’$ centers by transition IV).
4. Hydrogen incorporation into the gate oxide affects the creation of quasi-permanent damage considerably while the number of recoverable defects should remain more or less unaffected.

In this subsection the basic features of NBTI degradation and recovery dynamics have been investigated with a particular focus on the interplay of temperature and gate bias. New experimental procedures and setups have been developed which allow a deeper insight into the detailed attributes of defects, their response to environmental conditions and their dynamic transitions among each other. Based on these results a microscopic model has been developed which explains NBTI degradation and recovery dynamics as a two-stage process distinguishing clearly between recoverable and quasi-permanent damage. Our considerations suggest an intrinsic precursor within the SiO (math image) gate oxide, namely an oxygen vacancy, to be the major candidate causing threshold voltage degradation in PMOS devices. Once created during stress, it acts on the one hand as a positive defect charge ( $\mathrm {E}’$ center) counterbalancing the applied gate potential and on the other hand a catalyst triggering hydrogen release from Si–H bonds at the interface thereby generating quasi-permanent damage in the form of interface states (P $_\mathrm {b}$ centers) and locked-in oxide charges. Hydrogen comes into play concentrating on interface state generation during stress. In fact, the higher the passivation degree of the interface (number of Si–H bonds), the larger the expected amount of quasi-permanent damage associated with electrical stress. As opposed to quasi-permanent degradation, the fundamental oxygen vacancy precursor is supposed to be independent of hydrogen and should hence show only little response to BEOL process steps which incorporate hydrogen into the gate oxide. In the next chapter, the developed experimental features are applied to differently processed wafers where the hydrogen budget of the gate oxide is tuned during BEOL fabrication. This was done in order to check the fundamental statements of our model with respect to the impact of hydrogen.