2 Abstract

The complementary metal-oxide-semiconductor (CMOS) technology is the cornerstone of most electronic devices used in everyday life. In order to improve the performance of these devices, the MOS field-effect-transistors (MOSFETs) used in CMOS technologies are continuously optimized. In particular, the scaling of the geometry of MOSFETs down to dimensions in the nanometer regime has increased the switching rates, but on the other hand led to severe reliability issues. As a consequence, transistor reliability is intensively studied by many researchers world wide.

The most prominent mechanism which degrades the device performance and thus seriously affects the time-to-failure is known as the bias temperature instabilities (BTI). BTI manifests itself as a threshold voltage shift caused by charging and discharging of interface states and structural defects located in the dielectrics. During the last decades much attention has been put into modeling of BTI in large-area MOSFETs. However, the big disadvantage of considering large-area devices is that due to the huge number of defects present, only the average contribution of these defects to the shift of the threshold voltage can be studied. Conversely, by probing nanoscale transistors single charge capture and emission events of individual traps can be assessed, which provide detailed insight into the physics of charge trapping. To study charge capture and emission events of single defects, the time-dependent defect spectroscopy (TDDS) has been proposed and is discussed in detail in this work. In order to model the charge trapping kinetics, that is the bias and temperature dependent capture and emission times of single defects, the four-state non-radiative multiphonon (NMP) model is used.

Although the TDDS was already successfully applied to investigate single charge trapping in SiON pMOSFETs, no dedicated measurement setup was available which covers the large list of features of the TDDS. In this work a new measurement equipment, namely the TDDS measurement instrument (TMI), is developed and presented in detail. The TMI combines voltage units which allow to create arbitrary and highly accurate programmable voltage signals, and data sampling units to monitor the drain-source and gate current with a measurement resolution in the sub-picoampere regime. Furthermore, the TMI supports a high sampling frequency even at a current resolution in the picoampere regime. Using the TMI, charge trapping of single defects in conventional n-channel and p-channel MOSFETs, MOSFETs employing high-k dielectrics or even more exotic transistors based on 2D materials can be monitored. To analyze the measurement data, a sophisticated step detection algorithm is presented which is able to detect discrete steps in uniformly and non-uniformly sampled measurement data, just as they occur in TDDS experiments.

With the TMI, positive BTI (PBTI) of nMOSFETs has been investigated at the single defect level for the first time. Similar to negative BTI (NBTI) studies on pMOSFETs, single defects with bias-dependent and bias-independent emission times have been found. The intricate charge capture and emission dependence on the gate bias can be very well explained by our four-state NMP model. Next, SiGe quantum-well devices were investigated at the single defect level as well. Using detailed TCAD simulations which employ the four-state NMP model calibrated to our measurement data, we demonstrate that the device time-to-failure easily outperforms the lifetime of conventional Si pMOSFETs, underlining the superior NBTI of SiGe transistors. Afterwards, a method which allows to study the permanent contribution to the threshold voltage is presented and it is shown that even at zero bias at all four terminals a significant amount of charge becomes trapped in SiON pMOSFETs. Finally, the TMI is used to control a transistors array where more than 52000 MOSFETs can be studied and thus highly accurate statistics can be collected.

In summary, with the TMI a new powerful measurement framework has been developed which allows to characterize the transistor reliability with respect to BTI and hot carrier degradation in nanoscale and large-area devices. In combination with computer-controlled furnaces and probe stations, the TMI serves as a state-of-the-art device characterization instrument.