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4.3 Non-Ideal Transistor Structures

A conventional n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) is shown in Figure 4.2.

(-tikz- diagram)

Figure 4.2:  Schematic of a conventional p-channel MOSFET with a (math image) gate dielectric is shown. When a negative gate bias is applied a conducting channel is formed at the interface between the oxide and the substrate (red signs). Additionally, some defects due to imperfect atomic structure of the oxide are shown (orange dots).

Such devices consist of a poly-Si gate on top of the (math image) insulator. However, imperfections of the ideal (math image) are introduced either during device fabrication or due to interfaces between different materials. These deviations from the ideal atomic structure can lead to electrically active sites considered as charge traps in MOS structures. In the commonly used terminology traps occurring in thermally grown \( \SIO \) are classified into [25, 26]

  • • fixed oxide charges, due to structural defects in the \( \SIO \) near the \( \SIO \)/Si interface,

  • • mobile ionic charges, due to impurities,

  • • oxide trapped charges, due to trapped charges in the \( \SIO \),

  • • border traps, which are defined to be located within the first \( \approx \SI {3}{\nano \meter } \) of the \( \SIO \), and

  • • interface states, a consequence of the lattice mismatch between crystalline Si bulk and the amorphous (math image) insulator.

This phenomenological classification is shown in Figure 4.3.

(-tikz- diagram)

Figure 4.3:  The schematic of the (math image)/Si systems shows the different types of charges, after [25].

The thickness of the gate dielectric layers of modern transistors is below \( \SI {3}{\nano \meter } \), a consequence of the scaling of device geometries into the sub-nanometer regime. Thus traps in the oxide are commonly referred to as border traps. The border traps and interface states are both the most prominent point defects responsible for aging of the MOSFETs.

In Figure 4.4 the (math image) characteristics of an ideal defect-free and a fabricated n-channel MOSFET (nMOSFET) are compared.

(-tikz- diagram)

Figure 4.4:  The (math image) characteristics of an ideal p-channel MOSFET (pMOSFET) is compared to the (math image) characteristics of a real nMOSFET. The various charges and traps shift of the threshold voltage. Furthermore, a reduced subthreshold-slope (SS) and a reduced on current is a consequence of interface states and border traps.

As can be seen, both devices differ in their threshold voltage, sub-threshold slope and on current. The shift of the threshold voltage is caused by border traps, whereas the interface states are responsible for the reduction of the sub-threshold slope, as they degrade the channel mobility. These charges \( \rho (x) \), are distributed through the oxide and determine the total threshold voltage shift [27, 28]

(4.5) \{begin}{align} \dVth & = -\frac {1}{\Cox }\frac {1}{\tox }\int \limits _{\tox }x\rho (x)dx. \{end}{align}

(math image) the oxide capacitance per unit area and (math image)the oxide thickness. The average (math image) produced by \( N \) negatively charged traps approximated using the charge sheet approximation is

(4.6) \{begin}{align} \dVth & = \frac {qN}{\Cox }. \{end}{align}

Furthermore the (math image) accumulated during bias temperature instabilities (BTI) stress can be expressed in terms of a change of the oxide and interface charges \( \dQox \) and \( \dQit \). For the interface charges the charge capture and emission is assumed to be very fast. Thus the charge associated with these states follows the Fermi-level directly and can be expressed by [29]

(4.7) \begin{equation} \dQit (t) = \qO \int \dDit (\ET ,t)f(\EF ,\ET ,t)\mathrm {d}\ET \end{equation}

with \( \dDit (\ET ,t) \) the time-dependent density of interface states and \( f(\EF ,\ET ,t) \) their occupancy. When a large negative bias temperature instabilities (NBTI) stress bias is applied the Fermi-level is close to the valence band edge which corresponds to \( f(\EF ,\ET ,t)\sim 1 \). As a consequence all interface states which are generated during stress become charged. In contrast to the fast charge transitions associated with interface states, the charging and discharging of oxide traps has considerable larger transition times. As in that case the occupancy cannot directly follow the Fermi-level the oxide charge is given by [29]

(4.8) \begin{equation} \dQox (t) = \qO \iint \dDox (x,\ET ,t)\fox (x,\ET ,t)(1-x/\tox )\mathrm {d}x\mathrm {d}\ET \end{equation}

with \( \dDox (x,\ET ,t) \) the spatially dependent density of oxide traps and \( \fox (x,\ET ,t) \) the corresponding occupancy. Note that the impact of a single charge on \( \dQox (t) \) strongly depends on the position of the oxide trap. The closer the trap is located to the channel, the larger the impact of the trap on the \( \dQox (t) \), and implicitly on the threshold voltage, is.

Finally, the contributions of the interface states and oxide charges to the total threshold voltage shift can be summarized to

(4.9) \{begin}{align} \dVth & = -\frac {\dQox +\dQit }{\Cox } \nonumber \\ & = -\frac {q(\dNox +\dNit )}{\epsR \epsRef }\tox \{end}{align}

with the corresponding trap densities. The time-dependent \( \dVth (t) \) directly follows from changes of the interface trap density and oxide charge density. Such charging and discharging interactions are dynamic processes and can be describe statistically, see Section 7.

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