As a consequence of the stress, the following is typically observed, see Figure 5.2:
(i) Shift in the threshold voltage
(ii) Reduction of the transconductance , i.e. the slope of the characteristics
(iii) Reduction of the on current
The shift in the threshold voltage is typically attributed to oxide defects whereas interface states are often considered the reason for a reduction of the sub-threshold slope.
In the simplest case, the impact of BTI on the device characteristics for different technologies is typically expressed as a threshold voltage shift. While many definitions of the threshold voltage exists, the threshold voltage shift is often simply defined as the voltage difference between the gate bias of the unstressed and stressed device required to drive the same drain-source current, as indicated in Figure 5.2. As circuit designs rely on defined thresholds for the device on and off state, this definition also provides a good indication of the device deviation from its ideal behavior for circuit designers.
The most fundamental problem in experimentally assessing BTI is the fact that the degradation recovers as soon as the stress voltage is reduced. In fact, this recovery can be so strong, that even with a fast measurement using a delay of , 50 or more of the degradation is lost. This has dramatic consequences on reliability statements made at nominal operating conditions, which are typically extrapolated from experimental data recorded at higher temperatures and stress biases. An underestimation of BTI at such accelerated test conditions will lead to overly optimistic lifetimes of the devices. Furthermore, to develop models which can be used in device simulators to provide an accurate explanation of BTI a detailed knowledge of the entire stress and recovery characteristics is of utmost importance.
The most common experimental method to measure the threshold voltage shift is to apply a stress gate bias for a certain time and monitor the recovery of starting immediately after stress release. In Figure ?? typical stress and recovery traces are shown for NBTI/pMOSFET investigations.
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