D I S S E R T A T I O N

On the Design of Very Low Power Integrated Circuits

ausgeführt zum Zwecke der Erlangung des akademischen Grades
eines Doktors der technischen Wissenschaften

eingereicht an der Technischen Universität Wien
Fakultät für Elektrotechnik
von

Rui Martins


Sperrgasse 6/23
Wien XV.

Matrikelnummer 9426913
geboren am 27. Juli 1968 in Porto

Wien, im Dezember 1998

• Kurzfassung
• Abstract
• Resumo
• Dedication
• Acknowledgment
• List of Symbols
• List of Abbreviations
• 1. Introduction
  • 1.1 ECAD - Electronic Computer-Aided Design
  • 1.2 TCAD - Technology Computer-Aided Design
  • 1.3 The Future of ECAD/TCAD
  • 1.4 The VISTA TCAD Environment
  • 1.5 Outline of the Thesis
• 2. Semiconductor Technology Overview
  • 2.1 Lithography
  • 2.2 Etching
  • 2.3 Deposition
  • 2.4 Metalization
  • 2.5 Oxidation
  • 2.6 Chemical Mechanical Polishing
  • 2.7 Ion Implantation
  • 2.8 Diffusion
• 3. Layout Data in TCAD Frameworks
  • 3.1 VISTA's Layout Editor Basic Concepts
  • 3.2 Interface with Process Simulators
  • 3.3 Parameterized Layouts
    • 3.3.1 Generation of Layout sets
    • 3.3.2 Layout Set Example
  • 3.4 Layout and Lithography
    • 3.4.1 Phase-Shift Masks
    • 3.4.2 Taking Lithographic Effects into Account
    • 3.4.3 Simulation Examples
  • 3.5 Global Perspective
• 4. Low Power Strategies
  • 4.1 Causes for Power Consumption in ICs
  • 4.2 Speed in ICs
    • 4.2.1 Maximum Clock in Digital Circuits
    • 4.2.2 The Bandwidth of Analog Systems
    • 4.2.3 The Critical Issues
• 5. Low Voltage, Low Power Simulations
  • 5.1 Device Modeling
    • 5.1.1 The Simulation Environment
  • 5.2 Application Example
    • 5.2.1 A Low-Voltage, Low-Power Technology
    • 5.2.2 Device Simulation
    • 5.2.3 Circuit Simulation
• 6. Three-dimensional Interconnect Simulation
  • 6.1 Design for Interconnectivity
  • 6.2 Topography Simulation
    • 6.2.1 Solid Modeling
    • 6.2.2 Constructing a Grid
    • 6.2.3 Gridding Structures Generated from Cellular Topographies
  • 6.3 Capacitance, Resistance and Thermal Simulators
    • 6.3.1 Capacitance Extraction
    • 6.3.2 Resistance and Thermal Simulation
    • 6.3.3 Transient Simulation
  • 6.4 Size of the Domain of Simulation
  • 6.5 Commercial Tools
• 7. Applications
  • 7.1 Ring Oscillator Revisited
  • 7.2 DRAMs
    • 7.2.1 Trench Capacitor DRAM Cell
    • 7.2.2 Stacked Capacitor DRAM Cell
  • 7.3 Capacitance of General Interconnect Submicron Lines
  • 7.4 Contact Resistance Analysis
  • 7.5 Resistance of Interconnect Wires
  • 7.6 Laser Trimmed Resistors
• 8. Low-Voltage, Low-Power Operational Amplifiers
  • 8.1 Introduction
  • 8.2 Ultra Low Voltage Operational Amplifier Design
  • 8.3 Simulation Results
• 9. Summary and Outlook
• Bibliography
• Curriculum Vitae